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Kernel authors sometimes need an intermediate floating-point result to round before the next operation. Combining a multiply with an add or FP16 conversion can change that result.
Add IRBuilder.optimization_barrier(value) and rocke_b_optimization_barrier(builder, value). They return the same scalar value and type while preventing the compiler from combining operations across the returned value. Both builders use existing empty tied inline assembly; booleans and byte-sized values bridge through i32. Packed logical formats use their integer storage/carriers.
This PR covers the AMDGPU LLVM IR and COMGR compilation path. It includes Python/C++ parity emitters, native scalar admission and serialization/LLVM tests, committed LLVM and canonical-IR goldens, and GPU checks for bit preservation, lane predicates, and intermediate rounding. Native HIP-source lowering remains unsupported; existing Python HIP lowering is unchanged from develop.
The numeric suite uses COMGR directly and does not invoke hipcc. The native test runs as a standalone CTest, so the barrier-specific executable-discovery fixture, bare import conftest calls, and fixture .__wrapped__() access are removed.
Test plan and validation on f89b9389a7d8:
16/16 native CTests passed, including the installed provider-named barrier executable. The retained Python barrier suite passed all 21 cases with strict Python/C++ comparison.
The installed provider-layout full Python suite passed: 1,947 tests and 1,632 subtests; 454 capability/dependency skips.
Python/C++ LLVM parity passed all 76 families / 957 configurations for each of LLVM 20, 22, and 23. All seven barrier verifier configurations passed. All seven committed LLVM 20 and canonical-IR barrier goldens matched; the builders, parity emitters, and golden file are unchanged by this scope fix.
gfx942 COMGR GPU validation passed all 12 cases with zero skips on ROCm 7.14 / LLVM 23 (Slurm job 68057070). This GPU run used the Python LLVM engine; native/Python LLVM equality is established separately by the parity gates.
Top-level hooks over the committed PR range and git diff --check passed. The full relative-path guard flags the repository-relative bundle path in cmake/InstallGpuReferences.cmake:30; that file has the same blob at the develop base and this head, so the guard failure is inherited.
Rule 10: Neither new architecture configuration has an optimization_barrier entry in tests/instances/differential/golden/llvm_gfx_all.json. The golden checker treats unblessed configurations as informational, so parity alone leaves these cases without a fixed emission baseline. Add reviewed LLVM and canonical-IR golden hashes for both configurations, preserving existing entries.
@copilot resolve the merge conflicts in this pull request
Resolved in e55b104 by merging current develop, preserving upstream native-fixture discovery and barrier coverage. GitHub no longer reports merge conflicts. Validation passed: 23 runner tests, 16 native CTests, 117 Python regressions (33 optional-tool skips), barrier parity for LLVM 20/22/23, PR hooks, and secret scan. Focused review found no issues; automated review/security validation timed out twice on the large merge diff.
Rule 8 — A change inside shared structure reaches every member: this arch-neutral barrier API/lowering is reachable on every shipped target, but the parity family covers only gfx1250 and gfx950. core/arch/data/arch_specs.json:6-152 also registers gfx90a, gfx942, gfx1151, and gfx1201, and the public docs impose no target restriction, so those targets receive neither Python/C++ parity nor golden validation. Add configurations and golden entries for the remaining supported targets, or explicitly reject and document them as unsupported.
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ISSUE ID : AICK-2253
Kernel authors sometimes need an intermediate floating-point result to round before the next operation. Combining a multiply with an add or FP16 conversion can change that result.
Add
IRBuilder.optimization_barrier(value)androcke_b_optimization_barrier(builder, value). They return the same scalar value and type while preventing the compiler from combining operations across the returned value. Both builders use existing empty tied inline assembly; booleans and byte-sized values bridge throughi32. Packed logical formats use their integer storage/carriers.This PR covers the AMDGPU LLVM IR and COMGR compilation path. It includes Python/C++ parity emitters, native scalar admission and serialization/LLVM tests, committed LLVM and canonical-IR goldens, and GPU checks for bit preservation, lane predicates, and intermediate rounding. Native HIP-source lowering remains unsupported; existing Python HIP lowering is unchanged from develop.
The numeric suite uses COMGR directly and does not invoke
hipcc. The native test runs as a standalone CTest, so the barrier-specific executable-discovery fixture, bareimport conftestcalls, and fixture.__wrapped__()access are removed.Test plan and validation on
f89b9389a7d8:git diff --checkpassed. The full relative-path guard flags the repository-relative bundle path incmake/InstallGpuReferences.cmake:30; that file has the same blob at the develop base and this head, so the guard failure is inherited.