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gfx950 invalid MFMA config fix - #11980
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Codecov Report✅ All modified and coverable lines are covered by tests. ❌ Your project check has failed because the head coverage (48.80%) is below the target coverage (80.00%). You can increase the head coverage or adjust the target coverage. Additional details and impacted files@@ Coverage Diff @@
## develop #11980 +/- ##
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Coverage 70.12% 70.12%
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Files 2933 2933
Lines 481805 481904 +99
Branches 69467 69488 +21
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+ Hits 337836 337913 +77
- Misses 119716 119734 +18
- Partials 24253 24257 +4
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🟡 Changes recommended
Use skips: [] and update the stale TESTING.md documentation before approval.
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Pull request overview
Fixes an invalid gfx950 MFMA configuration by removing obsolete TensileLogic known-bug skips.
Changes:
- Removes two ROCM-7144 skip entries.
- Retains an empty known-bugs section.
File summaries
| File | Reviewed change |
|---|---|
projects/hipblaslt/tensilelite/Tensile/TensileLogic/known_bugs.yaml |
Removes obsolete gfx950 validation skips. |
Review details
Suppressed comments (1)
projects/hipblaslt/tensilelite/Tensile/TensileLogic/known_bugs.yaml:14
- After this deletion the bundled known-bugs file contains no entries, but TESTING.md:443 still states that all 14 current entries document gfx950 validation drift. Please update that documentation in the same change so it does not report exceptions that no longer exist.
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- Files reviewed: 1/3 changed files
- Comments generated: 1
- Review effort level: Lite
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Co-authored-by: Copilot Autofix powered by AI <175728472+Copilot@users.noreply.github.com>
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Addressed in commit |
Co-authored-by: aferoz21 <94614349+aferoz21@users.noreply.github.com>
Addressed in ec63092: updated the stale TensileLite TESTING text about known-bug entries, and the known-bugs YAML keeps an explicit empty list as |
JIRA ID : AIHPBLAS-4500
Motivation
<-- Found invalid MFMA configuration for 1 kernel in BBS NT library and this has been fixed-->
Technical Details
<-- Below matrix instruction and MFMA_BF16_1K is invalid,
MatrixInstruction: [16, 16, 16, 1]
MFMA_BF16_1K: false
This has been removed from 2 different places and validated -->
Test Plan
<-- Existing TensileLogic part of test suite finds this error and known_bugs.yaml has entry to skip this check, after the fix entry from known_bugs.yaml is removed and validated -->
Test Result
<--
GEMM size routed to different kernel validation is passed
[0]:transA,transB,grouped_gemm,batch_count,m,n,k,alpha,lda,stride_a,beta,ldb,stride_b,ldc,stride_c,ldd,stride_d,a_type,b_type,c_type,d_type,compute_type,scaleA,scaleB,scaleC,scaleD,amaxD,swizzle_a,swizzle_b,activation_type,bias_vector,bias_type,aux_type,rotating_buffer,flush,use_gpu_timer,hipblaslt-Gflops,hipblaslt-GB/s,us,CPU-Gflops,CPU-us,norm_error,atol,rtol
N,T,0,1,1,1,1,1,1,1,0,1,1,1,1,1,1,bf16_r,bf16_r,bf16_r,bf16_r,f32_r,0,0,0,0,0,0,0,none,0,bf16_r,bf16_r,0,0,0,2.67738e-06,7.4805e-06,747,2.14e-08,93458,0,1e-06,1e-06
--Solution index: 12143
--Solution name: Cijk_Ailk_Bjlk_BBS_BH_Bias_HA_S_SAV_UserArgs_MT16x16x32_MI16x16x1_SN_LDSB1_AFC0_AG0_AGGSUA0_AGNTAB0_AFEM1_AFEM1_ASEM1_BL1_BS1_CD1_1_CLR0_CLS0_CADS0_DTLA0_DTLB0_DTLM0_DTVA0_DTVB0_DTVMXSA0_DTVMXSB0_DTVSM0_DPLB0_EPS0_ELFLR0_EMLLn1_FDSI0_GRPM1_GRVWA1_GRVWB1_GSU0_GSUAMB_GSUC0_GSUWGMRR0_GLS0_HPLR0_ISA950_ICIW0_IU1_K1_LDSSI0_LDSTI0_LBSPPA128_LBSPPB128_LBSPPMXSA0_LBSPPMXSB0_LBSPPM0_LPA16_LPB16_LPMXSA0_LPMXSB0_LPMn1_LRVW8_LWPMn1_MIAV1_MIWT1_1_MXLIBL_MXSFNS_MO64_MGRIPM3_NTn1_NTA2_NTB2_NTC0_NTD0_NTE0_NTMXSA0_NTMXSB0_NTM0_NTWS0_NVn1_NVA0_NVB0_NVC0_NVD0_NVE0_NVMXSA0_NVMXSB0_NVM0_NVWS0_NEPBS14_NLCA1_NLCB1_ONLL1_PAP0_PGL0_PGR2_PLR0_PKA1_SGROB0_SIA3_SS1_SU0_SUM0_SUS64_SPO0_SRVW0_SSO0_SVW1_SK5_SKFTR0_SKFDPO0_SKWS0_SKXCCM0_SNLL0_SIP1_SGRO0_TDMI0_TDMIM0_TDMLWS0_TDMPLB0_TDMS0_TIN0_THn1_THA0_THB0_THC0_THD0_THE0_THMXSA0_THMXSB0_THM0_THWS0_TLDS2_TLDSM1_ULSGRO0_USL1_USLMX0_UDFMAC0_UIOFGRO0_UPLRP0_USFGRO0_USI0_VSn1_VWA1_VWB1_WSGRA0_WSGRB0_WS64_WG16_4_1_WGM1_WGMXCC1_WGMXCCGn1
-->
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