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feat(tensilelite): Enable PrefetchGL2 with GSU - #11851

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boringmorning merged 7 commits into
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Sep 21, 2026
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boringmorning merged 7 commits into
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@boringmorning boringmorning commented Sep 9, 2026 •

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JIRA ID : AIHPBLAS-4771

Motivation

PrefetchGL2 (the gfx1250 global_prefetch_b8 GL2 warm-up) was only usable on a narrow slice of the solution space: GlobalSplitU > 1 was rejected outright.This PR lifts the restriction so the prefetch stream follows the same K order the real load stream walks. When cluster is enabled, GSUWGMRR is forced on since the cluster owns ClusterDim[1] consecutive raw y values, and the default mapping makes the group the fast axis of that y (GSUSumIdx = wg1 % GSU), which spreads peers across chunks and folds their divided WorkGroup1 onto fewer tiles. Round-robin makes it the slow axis instead (GSUSumIdx = wg1 / NumWorkGroups1) so a cluster shares one group and spans distinct tiles.

Technical Details

GlobalSplitU (Components/GL2Prefetch.py, SolutionStructs/Solution.py)

  • calculateGSUIterOffset decodes bit 15 (GSUC) of the packed GSU kernel argument once per
    kernel and produces the unroll iteration this workgroup's chunk starts at: GSUSumIdx for
    interleaved chunks, or the accumulated iterations of the lower groups (via the existing
    calculateLoopNumIterOffsetGsu) for contiguous ones.
  • The start iteration is tensor independent, so it is derived once and each tensor scales it by its
    own per-iteration increment in applyGSUChunk, which then widens GL2PrefetchInc{tc} to the
    chunk stride (GSU interleaved, 1 contiguous). The chunk offset is applied before the PGR
    pre-skip, since it must consume the unscaled increment that the pre-skip then reuses at chunk
    stride.
  • The GSU rejection in Solution.py is dropped. Force GSUWGMRR on when cluster is enabled.

Test Plan

tox -e py3 -- Tensile/Tests -m common -k "gfx1250 and not streamk"
# this includes unit test tensilelite/Tensile/Tests/unit/test_gl2_prefetch_offset.py
tox -e py3 -- Tensile/Tests -m unit
tox -e py3 -- Tensile/Tests -m common -k "gfx1250 and streamk and core"
hipblaslt-test

Test Result

2 streamK yamls failed, not related to this PR. All other tests passed

[31mFAILED�[0m Tensile/Tests/common/test_config.py::�[1mtest_config[Tensile/Tests/common/streamk/gfx1250/core/sk_hybrid_quick.yaml]�[0m - subprocess.CalledProcessError: Command '['/home/marhuang/rocm-libraries/pro...
�[31mFAILED�[0m Tensile/Tests/common/test_config.py::�[1mtest_config[Tensile/Tests/common/streamk/gfx1250/core/sk_dynamic_sgemm_quick.yaml]�[0m - subprocess.CalledProcessError: Command '['/home/marhuang/rocm-libraries/pro...

Submission Checklist

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🚫 Please fix the failed policies before requesting reviews.

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Once all policies pass, the label will be removed automatically.

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Codecov Report

❌ Patch coverage is 32.14286% with 38 lines in your changes missing coverage. Please review.

Files with missing lines Patch % Lines
...aslt/tensilelite/Tensile/Components/GL2Prefetch.py 24.32% 27 Missing and 1 partial ⚠️
...blaslt/tensilelite/Tensile/KernelWriterAssembly.py 33.33% 7 Missing and 1 partial ⚠️
...lt/tensilelite/Tensile/SolutionStructs/Solution.py 60.00% 1 Missing and 1 partial ⚠️
Additional details and impacted files
@@             Coverage Diff             @@
##           develop   #11851      +/-   ##
===========================================
- Coverage    70.55%   70.55%   -0.01%     
===========================================
  Files         2810     2810              
  Lines       462487   462532      +45     
  Branches     68090    68094       +4     
===========================================
+ Hits        326286   326294       +8     
- Misses      112661   112696      +35     
- Partials     23540    23542       +2     
Flag Coverage Δ *Carryforward flag
TensileLite-CPP 46.45% <ø> (ø)
TensileLite-Unit 76.02% <32.14%> (-0.04%) ⬇️
hipBLAS 90.62% <ø> (ø) Carriedforward from 39bff5e
hipBLASLt 35.27% <ø> (ø)
hipCUB 82.68% <ø> (ø) Carriedforward from 39bff5e
hipDNN 87.02% <ø> (ø) Carriedforward from 39bff5e
hipFFT 42.66% <ø> (ø) Carriedforward from 39bff5e
hipRAND 76.12% <ø> (ø) Carriedforward from 39bff5e
hipSOLVER 68.92% <ø> (ø) Carriedforward from 39bff5e
hipSPARSE 86.99% <ø> (ø) Carriedforward from 39bff5e
rocBLAS 48.31% <ø> (ø) Carriedforward from 39bff5e
rocFFT 51.72% <ø> (ø) Carriedforward from 39bff5e
rocRAND 56.90% <ø> (ø) Carriedforward from 39bff5e
rocSOLVER 76.83% <ø> (ø) Carriedforward from 39bff5e
rocSPARSE 74.61% <ø> (ø) Carriedforward from 39bff5e
rocThrust 91.60% <ø> (ø) Carriedforward from 39bff5e

*This pull request uses carry forward flags. Click here to find out more.

Files with missing lines Coverage Δ
...aslt/tensilelite/Tensile/Common/ValidParameters.py 100.00% <ø> (ø)
...ects/hipblaslt/tensilelite/Tensile/KernelWriter.py 73.92% <100.00%> (+0.01%) ⬆️
...lt/tensilelite/Tensile/SolutionStructs/Solution.py 58.79% <60.00%> (+0.01%) ⬆️
...blaslt/tensilelite/Tensile/KernelWriterAssembly.py 70.31% <33.33%> (-0.05%) ⬇️
...aslt/tensilelite/Tensile/Components/GL2Prefetch.py 81.60% <24.32%> (-12.25%) ⬇️
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boringmorning and others added 6 commits September 11, 2026 03:52
(cherry picked from commit c581f26)
Add GlobalSplitU 2 to the gfx1250 TDM-multicast PrefetchGL2 fork so the
contiguous-chunk (GSUC) layout gets benchmarked, and drop the stale comments
that said PrefetchGL2 rejects GSU > 1.

Co-authored-by: Cursor <cursoragent@cursor.com>
…ject 6-bit float

The prefetch stream derives its K chunk from the GSU and GSUSumIdx SGPRs at
run time, so it follows a host-supplied GSU as well as the tuned one; drop the
SupportUserGSU force-off. Separately, a 256-byte prefetch granule is not a
whole number of 6-bit elements, so reject 6-bit float rather than emit the
wrong address math. Widen the multicast benchmark to the [1,1] and [2,2]
cluster shapes.

Co-authored-by: Cursor <cursoragent@cursor.com>
The default launch does not give a cluster's workgroups a shared GSU group.
The WG-id decode sets WorkGroup1 = cluster_y*nwg_y + wg_y, so a cluster owns
consecutive raw y values, and GSUOn.graWorkGroup then takes GSUSumIdx =
wg1 % GSU with GlobalSplitUWorkGroupMappingRoundRobin off by default. Cluster
peers therefore land on different K chunks and their divided WorkGroup1
collapses onto one tile, while the harness feeds the group index from grid z
and keeps them distinct -- so pairing the two asserted a fan-out production
does not build.

Move the GSU configs to ClusterDim [1,1] and record the reasoning. MT 768 on
gsu3_contiguous_rem carries the non-POT ncc and multi-load geometry the cluster
used to supply; the fan-out itself stays covered by the cluster configs.

Co-authored-by: Cursor <cursoragent@cursor.com>
With GlobalSplitUWorkGroupMappingRoundRobin set, GSUOn.graWorkGroup splits the
raw y index as GSUSumIdx = wg1 / NumWorkGroups1, making the group the slow axis,
so a cluster's workgroups share one group and span distinct tiles. That makes
GSU + ClusterDim a launch the prefetch has to handle, which the default mapping
does not produce.

Add four configs for it. They are not a second copy of the chunk math: the
per-iteration increment is built from the cluster-folded leading extent, so the
chunk offset startIter*inc is itself scaled by the cluster and the folded block
has to translate as one piece. Covers both chunk layouts, the widest [4,4]
fan-out with an uneven split, non-POT cluster extents, and MX scales where each
tensor scales the shared start iteration by its own increment.

Rework the mapping note to describe both arrangements rather than only the
default one.

Co-authored-by: Cursor <cursoragent@cursor.com>
@boringmorning
boringmorning force-pushed the users/boringmorning/gl2-gsu branch from e3e03ba to 39bff5e Compare September 11, 2026 04:36
@boringmorning
boringmorning merged commit 9b702dc into develop Sep 21, 2026
113 of 122 checks passed
@boringmorning
boringmorning deleted the users/boringmorning/gl2-gsu branch September 21, 2026 04:53
tony-davis added a commit that referenced this pull request Sep 21, 2026
Reverts #11851

Fixes #12384

## Motivation

`TensileLite coverage / Linux` has been red on `develop` since #11851
landed, and `Component CI Summary` is a required check, so every PR that
triggers the tensilelite lane is blocked. The gate reports one regressed
file:

```text
coverage_ratchet: FAIL - 1 file(s) regressed:

   baseline    current     delta  file
     94.98%     84.65%   -10.33  Tensile/Components/GL2Prefetch.py
```

#11851 did ship tests (`test_gl2_prefetch_offset.py` and
`test_prefetchgl2_streamk_guard.py`), but the new GSU prefetch paths
outran them, so the file measures 10.33 points below the floor #11939
set for it on Sep 11. #12384 has the full bisect: last green on
`3082a49c`, red on #11851's own merge commit and on every
tensilelite-touching push since.

## Technical Details

Straight revert of #11851, no hand edits. It removes the
GSU-with-PrefetchGL2 enablement from `GL2Prefetch.py`,
`KernelWriter.py`, `KernelWriterAssembly.py`, `Solution.py` and
`ValidParameters.py`, plus the two unit tests and the
`tdm_multicast_gfx1250.yaml` test config that came with it.

`GL2Prefetch.py` at this PR's head is byte-identical to the file on
`3082a49c`, the last commit where the coverage lane was green (blob
`4256c495c` in both). So this clears the gate without touching
`coverage-baseline.json`, and the 94.98% floor stands as-is.

This also clears the red on bump PR #12364 and anything else currently
tripping the lane.

## Test Plan

- `TensileLite coverage / Linux` on this PR. It re-measures
`GL2Prefetch.py` from source against the committed baseline, so a green
run is the direct check that the floor is satisfied again.
- The rest of the tensilelite and hipblaslt CI as normal for a codegen
change. This removes a kernel-generation path, so the functional suites
are the check that nothing depended on it.

## Test Result

Pending this PR's own CI run.

## Submission Checklist

- [x] Look over the contributing guidelines at
https://github.com/ROCm/ROCm/blob/develop/CONTRIBUTING.md#pull-requests.

## Risk level

Low (2). This restores the exact `GL2Prefetch.py` content that was on
`develop` for the two weeks before #11851, so the path it removes has
only been live since Sep 21. The cost is feature loss rather than
instability: anyone depending on PrefetchGL2 with GSU loses it until a
re-land. No baseline or CI configuration changes.
@assistant-librarian

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TheRock Submodule Bump Activity

Newest first

evedovelli pushed a commit that referenced this pull request Sep 23, 2026
Reverts #11851

Fixes #12384

## Motivation

`TensileLite coverage / Linux` has been red on `develop` since #11851
landed, and `Component CI Summary` is a required check, so every PR that
triggers the tensilelite lane is blocked. The gate reports one regressed
file:

```text
coverage_ratchet: FAIL - 1 file(s) regressed:

   baseline    current     delta  file
     94.98%     84.65%   -10.33  Tensile/Components/GL2Prefetch.py
```

#11851 did ship tests (`test_gl2_prefetch_offset.py` and
`test_prefetchgl2_streamk_guard.py`), but the new GSU prefetch paths
outran them, so the file measures 10.33 points below the floor #11939
set for it on Sep 11. #12384 has the full bisect: last green on
`3082a49c`, red on #11851's own merge commit and on every
tensilelite-touching push since.

## Technical Details

Straight revert of #11851, no hand edits. It removes the
GSU-with-PrefetchGL2 enablement from `GL2Prefetch.py`,
`KernelWriter.py`, `KernelWriterAssembly.py`, `Solution.py` and
`ValidParameters.py`, plus the two unit tests and the
`tdm_multicast_gfx1250.yaml` test config that came with it.

`GL2Prefetch.py` at this PR's head is byte-identical to the file on
`3082a49c`, the last commit where the coverage lane was green (blob
`4256c495c` in both). So this clears the gate without touching
`coverage-baseline.json`, and the 94.98% floor stands as-is.

This also clears the red on bump PR #12364 and anything else currently
tripping the lane.

## Test Plan

- `TensileLite coverage / Linux` on this PR. It re-measures
`GL2Prefetch.py` from source against the committed baseline, so a green
run is the direct check that the floor is satisfied again.
- The rest of the tensilelite and hipblaslt CI as normal for a codegen
change. This removes a kernel-generation path, so the functional suites
are the check that nothing depended on it.

## Test Result

Pending this PR's own CI run.

## Submission Checklist

- [x] Look over the contributing guidelines at
https://github.com/ROCm/ROCm/blob/develop/CONTRIBUTING.md#pull-requests.

## Risk level

Low (2). This restores the exact `GL2Prefetch.py` content that was on
`develop` for the two weeks before #11851, so the path it removes has
only been live since Sep 21. The cost is feature loss rather than
instability: anyone depending on PrefetchGL2 with GSU loses it until a
re-land. No baseline or CI configuration changes.
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