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fix(tensilelite): accept either M/N orientation for SourceSwap MI val… - #11773

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Sep 8, 2026
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jichangjichang merged 1 commit into
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users/jichang/fix_32_16_rejection

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@jichangjichang

@jichangjichang jichangjichang commented Sep 8, 2026 •

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JIRA ID : AIHPBLAS-835

Motivation

#11746 caused the issue.
Building the gfx1250 device library and benchmarking F4 SourceSwap solutions
failed on the MatrixInstruction validator. validateMIParameters is dual-use:

  • Solution generation (matrixInstructionToMIParameters) sets
    MatrixInstM = mi[0], MatrixInstN = mi[1] in the instruction's native
    operand order (SourceSwap not applied).
  • Serialized LibraryLogic yaml stores the SourceSwap-transposed order,
    so MatrixInstM/MatrixInstN come in swapped.

The prior code asserted only the transposed orientation when SourceSwap
was set. That broke the un-swapped path for non-square instructions such as
the F4 32×16 WMMA

Technical Details

When SourceSwap is set, compare MatrixInstM/MatrixInstN against
mi4[0]/mi4[1] as an unordered set instead of asserting a fixed
transposed mapping.
This accepts both conventions (native benchmark order and swapped logic
order) while still rejecting genuinely mismatched M/N. The non-SourceSwap
branch and the K/B asserts are unchanged.

Test Plan

  • Run the previously-failing F4 yamls through the full BenchmarkProblems →
    LibraryLogic pipeline
  • Confirm zero Error processing permutation and a valid best solution.
  • Confirm non-SourceSwap and square-instruction paths still validate.

Test Result

Pass

Submission Checklist

…idation

  validateMIParameters is dual-use: solution generation
  (matrixInstructionToMIParameters) keeps the instruction's native operand
  order (M=mi[0], N=mi[1]), while the serialized LibraryLogic yaml stores
  the SourceSwap-transposed order. The previous strict-swap assert only
  accepted the transposed orientation, so the benchmark/solution-generation
  path failed for non-square SourceSwap instructions (e.g. F4 32x16 WMMA)
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🧪 Unit Test ⚠️ Warning Error: Source/code files changed without an accompanying unit test.
Expected: add at least one test file named like test_<name>.py / test_<name>.cpp (or <name>_test.*).
Current: code file(s) changed: projects/hipblaslt/tensilelite/Tensile/SolutionStructs/Validators/MatrixInstruction.py; no test file found
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🎉 All checks passed! This PR is ready for review.

@jichangjichang
jichangjichang merged commit eee01ff into develop Sep 8, 2026
98 of 114 checks passed
@jichangjichang
jichangjichang deleted the users/jichang/fix_32_16_rejection branch September 8, 2026 08:45
assistant-librarian Bot pushed a commit to ROCm/hipBLASLt that referenced this pull request Sep 8, 2026
=?UTF-8?q?fix(tensilelite):=20accept=20either=20M/N=20ori?=
 =?UTF-8?q?entation=20for=20SourceSwap=20MI=20val=E2=80=A6=20(#11773)?=
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

JIRA ID : AIHPBLAS-835

  ## Motivation
  #11746 caused the issue.
Building the gfx1250 device library and benchmarking F4 SourceSwap
solutions
failed on the MatrixInstruction validator. `validateMIParameters` is
dual-use:

  - **Solution generation** (`matrixInstructionToMIParameters`) sets
`MatrixInstM = mi[0]`, `MatrixInstN = mi[1]` in the instruction's native
    operand order (SourceSwap not applied).
- **Serialized LibraryLogic yaml** stores the SourceSwap-transposed
order,
    so `MatrixInstM`/`MatrixInstN` come in swapped.

The prior code asserted *only* the transposed orientation when
`SourceSwap`
was set. That broke the un-swapped path for non-square instructions such
as
  the F4 32×16 WMMA

  ## Technical Details
  When `SourceSwap` is set, compare `MatrixInstM`/`MatrixInstN` against
  `mi4[0]`/`mi4[1]` as an **unordered set** instead of asserting a fixed
  transposed mapping.
This accepts both conventions (native benchmark order and swapped logic
order) while still rejecting genuinely mismatched M/N. The
non-SourceSwap
  branch and the K/B asserts are unchanged.

  Test Plan

- Run the previously-failing F4 yamls through the full BenchmarkProblems
→
  LibraryLogic pipeline
  - Confirm zero Error processing permutation and a valid best solution.
  - Confirm non-SourceSwap and square-instruction paths still validate.

  Test Result

  Pass

  Submission Checklist

- [ ] Look over the contributing guidelines at
https://github.com/ROCm/ROCm/blob/develop/CONTRIBUTING.md#pull-requests.
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Codecov Report

❌ Patch coverage is 0% with 1 line in your changes missing coverage. Please review.

Files with missing lines Patch % Lines
...le/SolutionStructs/Validators/MatrixInstruction.py 0.00% 1 Missing ⚠️

❌ Your project status has failed because the head coverage (35.22%) is below the target coverage (80.00%). You can increase the head coverage or adjust the target coverage.

Additional details and impacted files
@@           Coverage Diff            @@
##           develop   #11773   +/-   ##
========================================
  Coverage    69.41%   69.41%           
========================================
  Files         2828     2828           
  Lines       470121   470120    -1     
  Branches     69418    69418           
========================================
  Hits        326311   326311           
+ Misses      120105   120104    -1     
  Partials     23705    23705           
Flag Coverage Δ *Carryforward flag
TensileLite-CPP 38.52% <ø> (ø)
TensileLite-Unit 76.06% <0.00%> (+<0.01%) ⬆️
hipBLAS 90.62% <ø> (ø) Carriedforward from bf1f3c1
hipBLASLt 35.22% <ø> (ø)
hipCUB 82.68% <ø> (ø) Carriedforward from bf1f3c1
hipDNN 86.96% <ø> (ø) Carriedforward from bf1f3c1
hipFFT 42.66% <ø> (ø) Carriedforward from bf1f3c1
hipRAND 76.12% <ø> (ø) Carriedforward from bf1f3c1
hipSOLVER 68.92% <ø> (ø) Carriedforward from bf1f3c1
hipSPARSE 86.99% <ø> (ø) Carriedforward from bf1f3c1
rocBLAS 48.31% <ø> (ø) Carriedforward from bf1f3c1
rocFFT 47.78% <ø> (ø) Carriedforward from bf1f3c1
rocRAND 56.92% <ø> (ø) Carriedforward from bf1f3c1
rocSOLVER 76.83% <ø> (ø) Carriedforward from bf1f3c1
rocSPARSE 74.61% <ø> (ø) Carriedforward from bf1f3c1
rocThrust 91.60% <ø> (ø) Carriedforward from bf1f3c1

*This pull request uses carry forward flags. Click here to find out more.

Files with missing lines Coverage Δ
...le/SolutionStructs/Validators/MatrixInstruction.py 92.11% <0.00%> (+0.48%) ⬆️
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TheRock Submodule Bump Activity

Newest first

mengzcai added a commit that referenced this pull request Sep 14, 2026
JIRA ID : AIHPBLAS-835
## Motivation
`validateMIParameters` is dual-use but was fed MatrixInstM/N in two
conventions: the tuning path (`matrixInstructionToMIParameters`)
produced the physical instruction order, while serialized logic
solutions carry the effective (SourceSwap-transposed) order.
Related works:
#11746 , #11773 
<!-- Explain the purpose of this PR and the goals it aims to achieve.
-->

## Technical Details
- `matrixInstructionToMIParameters` gains `sourceSwap` (default False,
so existing callers are unchanged) and stores the *effective* extents
via `effectiveMatrixInstMN` as its final step. Internal derivations and
MIBlock keep the physical mi[0]/mi[1] for the opcode. Its three callers
pass SourceSwap.
- `validateMIParameters` derives the expected M/N from the physical
MatrixInstruction with the same helper and compares in effective space,
replacing both prior variants and again rejecting a genuinely transposed
M/N.
- No consumer change: Solution.py already re-derives M/N from MIBlock,
and physical-sensitive code reads MIBlock.
<!-- Explain the changes along with any relevant GitHub links. -->

## Test Plan
New GPU-less guard (`test_fp4_SourceSwap_nonsquare_guard.py`): runs the
`--cpu-only` benchmark flow on a config whose only candidates are 32x16
WMMA + SourceSwap:[true]. With no square / SS-false fallback a
regression rejects every candidate -> 0 valid solutions -> `printExit`
fails the run, the failure a mixed candidate list would silently mask.
gfx1250 is named explicitly (gfx1250v0 has no fp4 32x16 opcode). Plus a
negative control and existing SourceSwap:false paths as regression.
<!-- Explain any relevant testing done to verify this PR. -->

## Test Result
- `tox -e unit --
Tensile/Tests/unit/test_fp4_SourceSwap_nonsquare_guard.py` -> **1 passed
in ~3.8s**.
- Negative control (producer forced back to physical M/N) ->
`Tensile::FATAL: 0 valid solutions` -> **1 failed**.
- gfx1250 hardware tuning: passed
- gfx1250 build and hipblaslt-test passed

<!-- Briefly summarize test outcomes. -->

## Submission Checklist

- [x] Look over the contributing guidelines at
https://github.com/ROCm/TheRock/blob/main/GOVERNANCE.md#pull-requests.

---------

Co-authored-by: mengzcai <mengzcai@amd.com>
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3 participants