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Revert "fix(stinkytofu): use target arch for backend selection in cross-arch …" - #11757

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revert-11641-users/yuchi/stinkytofu-logicalir-full-build-fix
Sep 7, 2026
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amd-chiranjeevi merged 1 commit into
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revert-11641-users/yuchi/stinkytofu-logicalir-full-build-fix

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@amd-chiranjeevi

@amd-chiranjeevi amd-chiranjeevi commented Sep 7, 2026 •

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Reverts PR: #11641
Fix issue :#11759

Test Run: https://github.com/ROCm/TheRock/actions/runs/34124552687/job/101752613373 --> gfx125x mathlibs stage passed.

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therock-pr-bot Bot commented Sep 7, 2026 •

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✅ All Policy Checks Passed

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📝 PR Description ✅ Pass —
⛔ Forbidden Files ✅ Pass —
🧪 Unit Test ✅ Pass —
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🚫 Please fix the failed policies before requesting reviews.

The following policy checks failed:

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Codecov Report

❌ Patch coverage is 66.66667% with 3 lines in your changes missing coverage. Please review.

Files with missing lines Patch % Lines
...ts/hipblaslt/tensilelite/rocisa/rocisa/__init__.py 0.00% 3 Missing ⚠️
Additional details and impacted files
@@             Coverage Diff             @@
##           develop   #11757      +/-   ##
===========================================
+ Coverage    69.40%   69.41%   +0.01%     
===========================================
  Files         2828     2828              
  Lines       470188   470130      -58     
  Branches     69433    69419      -14     
===========================================
- Hits        326316   326311       -5     
+ Misses      120165   120115      -50     
+ Partials     23707    23704       -3     
Flag Coverage Δ *Carryforward flag
TensileLite-CPP 38.52% <ø> (+<0.01%) ⬆️
TensileLite-Unit 76.05% <66.67%> (+0.06%) ⬆️
hipBLAS 90.62% <ø> (ø) Carriedforward from f77c1c9
hipBLASLt 35.22% <ø> (ø)
hipCUB 82.68% <ø> (ø) Carriedforward from f77c1c9
hipDNN 86.96% <ø> (ø) Carriedforward from f77c1c9
hipFFT 42.66% <ø> (ø) Carriedforward from f77c1c9
hipRAND 76.12% <ø> (ø) Carriedforward from f77c1c9
hipSOLVER 68.92% <ø> (ø) Carriedforward from f77c1c9
hipSPARSE 86.99% <ø> (ø) Carriedforward from f77c1c9
rocBLAS 48.31% <ø> (ø) Carriedforward from f77c1c9
rocFFT 47.78% <ø> (ø) Carriedforward from f77c1c9
rocRAND 56.92% <ø> (ø) Carriedforward from f77c1c9
rocSOLVER 76.83% <ø> (ø) Carriedforward from f77c1c9
rocSPARSE 74.61% <ø> (ø) Carriedforward from f77c1c9
rocThrust 91.60% <ø> (ø) Carriedforward from f77c1c9

*This pull request uses carry forward flags. Click here to find out more.

Files with missing lines Coverage Δ
...lt/tensilelite/Tensile/TensileCreateLibrary/Run.py 87.85% <100.00%> (+4.87%) ⬆️
...ts/hipblaslt/tensilelite/rocisa/rocisa/__init__.py 0.00% <0.00%> (ø)

... and 1 file with indirect coverage changes

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@TriveniTadapaneni
TriveniTadapaneni self-requested a review September 7, 2026 14:15

@TriveniTadapaneni TriveniTadapaneni left a comment

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LGTM

@amd-chiranjeevi
amd-chiranjeevi merged commit bee97df into develop Sep 7, 2026
151 of 183 checks passed
@amd-chiranjeevi
amd-chiranjeevi deleted the revert-11641-users/yuchi/stinkytofu-logicalir-full-build-fix branch September 7, 2026 14:16
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TheRock Submodule Bump Activity

Newest first

@amd-chiranjeevi amd-chiranjeevi added the bump-pr-revert reverted pr which were created to unblock bump pr in throck label Sep 8, 2026
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