[kevin-mii]

Summary

Add out_zeroed=False to the blockscale bpreshuffle asm entrypoint and tuned dispatcher. With out_zeroed=True, the caller promises the output already contains zeros, allowing the split-K launcher to skip its redundant clear. This lets a fused producer clear the output without requiring a copied custom GEMM launcher.

The default preserves the existing clear. The opt-in flag preserves upstream’s output alignment checks, row-stride support, and fp16 fallback. A row-padded output keeps its padding untouched. The dispatcher requires an explicit output when the flag is enabled.

Validation

Against main 1dd826c42, on gfx950 / ROCm 10 / PyTorch 2.11:

• All 22 cases in op_tests/test_gemm_a8w8_blockscale_bpreshuffle_out.py passed.
• Added coverage exercises direct asm and tuned dispatch, contiguous and row-padded pre-zeroed outputs, sentinel preservation, a deliberately nonzero output proving that the clear is skipped, and alignment rejection with the flag enabled.
• Existing CK/CK-Tile/asm output-layout and fp16 fallback cases passed.
• Black, CI-pinned Ruff 0.16.0, and whitespace checks passed.

The flag is still absent upstream. This remains a draft; the original producer-integrated performance result has not been re-benchmarked on this updated branch.

[github-actions]

🏷️ CI Guide

Runs automatically on every PR:

• ✅ Pre-checks (submodule verification, code formatting)
• ✅ Aiter op tests (gfx942 + gfx950)
• ✅ Triton tests on MI35X (only when aiter/ops/triton/** or related paths are changed)

Extended tests (opt-in via labels):

Label	Tests
ci:gfx1250-ffm-triton	Run the five-shard gfx1250 FFM Triton test suite
ci:triton-300x	Run an additional Triton test job on MI300X in PRs (added automatically when gfx942 configs change); main branch always runs both MI35X and MI300X
ci:triton-355	Run the full Triton test suite on MI35X, not only the tests the change affects
ci:windows	Windows JIT op smoke test on the gfx1201 ROCm runner
ci:multi-gpu	Aiter multi-GPU tests on the 8-GPU runner
ci:sglang	SGLang integration tests: DeepSeek-R1-MXFP4 accuracy, Qwen 3.5 accuracy
ci:atom	ATOM benchmark: DeepSeek-R1-0528, GPT-OSS-120B
ci:atom_full	ATOM accuracy suite for PR and main models from ATOM models_accuracy.json
ci:vllm	vLLM benchmark: DeepSeek-V4-Pro, MiniMax-M3-MXFP4
ci:all	All standard extended tests (excludes ci:atom_full)

Only add ci:atom_full for FlyDSL or Triton upgrades.
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[kevin-mii]

Updated against main while preserving the new fp16 fallback, output-row stride handling and split-K alignment checks. out_zeroed=True only skips the clear; it does not bypass validation.

On gfx950 / ROCm 10, the output-layout suite passed all 22 cases. The added cases cover the direct asm entry and tuned dispatcher, contiguous and row-padded pre-zeroed outputs, sentinel preservation, deliberate nonzero input proving the clear was skipped, and rejection of misaligned outputs even when the flag is set. Black, Ruff and whitespace checks pass.

The flag is still absent upstream and remains useful for a producer that clears the output. Keeping the existing draft status; the original end-to-end performance claim was not re-benchmarked in this pass.