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[FlyDSL] Simplify kernel APIs and remove redundant wrappers - #6380
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…-api # Conflicts: # aiter/ops/flydsl/kernels/gemm_a16w16_gfx950_utils.py # aiter/ops/flydsl/kernels/mixed_moe_gemm_2stage_common.py
…-api # Conflicts: # aiter/ops/flydsl/kernels/conv/conv3d_gfx950_utils.py
Use floor division for integer layout and K-wave coordinates after the typed API migration. True division on fx.Index emits an invalid index-to-float conversion. Use Python isinstance for the Fly pointer type; PointerType.isinstance is unavailable in the pinned FlyDSL 0.4.0 wheel.
Keep the rocdl dialect import required by the new gfx942 BufferTensor helper while retaining the typed TargetAddressSpace API.
Preserve the updated persistent MLA pipeline and reapply the existing typed-fill and comparison simplifications at their new locations.
Resolve the conflict in aiter/ops/flydsl/kernels/moe_reduce.py by taking the PR's route-validity gate (skip_invalid_ids plus the clamped EP mask gather) on top of main's post-ROCm#6380 FlyDSL API, i.e. fx.full instead of the removed fx.Vector.filled helper. Two test expectations no longer matched main's retuned CSVs: * dsv3_fp4_tuned_fmoe.csv was retuned to an MXMOE stage-1 for the inter_dim = 256 decode row and the 256-tile stage-2 moved to the 128-tile/persist variant. Point the determinism test at the remaining flydsl_moe1_ row (token=32, inter_dim=512). * op_tests/test_moe_glm5_fp4_ep_dispatch.py (added upstream after the PR base) asserts the tuned atomic stage2 names; dispatch now rewrites those rows to their reduce sibling, so assert the resolved reduce name and that the cached tuning row keeps the atomic epilogue. Validated on a gfx950 VF: 78 passed for test_mxfp4_stage2_epilogue_determinism.py, test_moe_glm5_fp4_ep_dispatch.py and flydsl_tests/test_flydsl_moe.py; black, ruff and git diff --check clean.
Summary
Remove redundant scalar and vector reconstruction across FlyDSL attention, MoE, GEMM, routing, communication, and convolution kernels. Use typed arithmetic, pointers, atomics, layouts, and quantization helpers while preserving kernel schedules, memory ordering, and numerical behavior.
fx.fullfor vector fills. The repository-wide wrapper pass removes 719 scalar constructors, 60 vector constructors, and 30from_elementscalls, and shortens 145 fill calls.5e3456494b877386d58c9ec6ca5e6a7fb37d40c7, including the updated persistent MLA and MegaMoE TP paths. Resolve the MLA conflict while retaining the new pipeline. The PR contains 115 source files and a net reduction of 612 lines. Validation scripts and generated artifacts are outside the diff.Current merge validation
Against main
5e3456494b, using pinned FlyDSL 0.4.0:.sdumps differ; their actual code objects and disassembly match. Repeated builds of unchanged main reproduce the dump-only variation because FlyDSL recompiles a clone to produce that diagnostic.git diff --checkpass for the 115 changed files. This gfx1250 validation is compile-only.Compilation used main
1b1bc88f20; the only subsequent main change is a Gluon utility update. The FlyDSL runtime and AOT source trees are identical in5e3456494b.Earlier validation
Using the pinned FlyDSL 0.4.0, with final comparisons against main
9e2884545:git diff --checkpass for all 114 changed files.Performance
On an otherwise idle gfx950 GPU, run main→PR and PR→main after warm-up. The table reports medians of repeated HIP-event measurements around graph replays, with compilation outside timing. The 19 cases range from −0.52% to +0.41%; no performance regression was observed.
The timing baseline is
eb56b2d45, whose measured kernel sources are unchanged in main9e2884545. Convolution is checked separately against the current main with identical ISA and GPU reference results.HGEMM: M/N/K = 32/384/7168. BMM: batch/M/N/K = 4/64/256/512. Mixed MoE: 32 tokens, 2 experts, top-k 2, model/intermediate dimensions 256; MXFP4 stage 2 uses 16 tokens. FMHA: batch 1, sequence 2048, 8 query heads/2 KV heads, dimensions 128. PA decode: context lengths 257/513, 2 partitions, head dimension 128. Compressors: batch 8 with MTP3, D=512 for BF16 and D=128 for FP4.
Runtime measurements cover representative shapes on gfx950. gfx942 and gfx1250 validation is compile-only; no runtime performance claim is made for those targets.