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[Triton/Gluon] [JIT] # RDNA3 fp8 enablement + tuned DSV4 A8W8 block-scale GEMM configs - #5217
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Agreed. In addition, |
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🟡 Changes recommended
Three specialized configurations are never selected by the existing unit-test matrix.
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Review details
- Files reviewed: 7/7 changed files
- Comments generated: 3
- Review effort level: Balanced
get_fp8_dtypes / get_fp8_e4m3_dtype fell through to the fnuz fp8 types on gfx1100/1101/1102/1151, so fp8 e4m3 tensors from vLLM were mis-typed. Add the gfx11 archs to both, mirroring the defaultDtypes map (ROCm#4764). Signed-off-by: xawang <xawang@amd.com>
Tuned DeepSeek-V4 TP=8 block-scale GEMM shapes for gfx1100 (RDNA3): N=1536-K=4096, N=512-K=4096, N=4096-K=1024, N=4096-K=256, N=8192-K=1024, plus DEFAULT fallback. Placed in the nested config layout (ROCm#4927). Signed-off-by: xawang <xawang@amd.com>
Squashes the post-tuning cleanup for the gfx1100 A8W8 block-scale GEMM
and extends fp8 support to gfx1150 (RDNA3.5).
Remove M-dependent GRID_MN constexpr from the block-scale kernels.
GRID_MN was promoted to a tl.constexpr via @triton.heuristics, so its
value (a function of M) entered the Triton compile-cache key. Every new
M therefore cold-compiled a fresh kernel, even though GRID_MN's only
consumer was remap_xcd(pid, GRID_MN) whose return value was discarded --
a no-op on every arch (and inert on single-XCD RDNA anyway). Drop the
GRID_MN heuristic, constexpr param, repr entry, and the dead remap_xcd
call (plus its now-unused import) from both _gemm_a8w8_blockscale_kernel
and the preshuffle variant. M now reaches the key only through the
16-divisibility specialization, matching the one-binary-per-shape
behavior of the vLLM-native kernels. num_pid_m/num_pid_n are still
computed at runtime and the masked store handles arbitrary M/N, so this
is behavior-preserving. Verified cos=1.0 / relL2<=1e-4 across M in
{1,2,3,16,17,31,64,128,129,256,384,512}; with a fixed config it compiles
<=2 binaries for all 12 M values (was ~1 per distinct M).
DRY get_fp8_e4m3_dtype() to delegate to get_fp8_dtypes() rather than
duplicating the gfx arch list (per PR review). The returned e4m3 dtype is
identical, so no behavior change.
Drop the deprecated kpack field from the tuned gfx1100 block-scale
configs; it is ignored by the current kernel and its presence tripped
config-schema validation.
Add gfx1150 (RDNA3.5) to fp8 dtype selection (OCP e4m3fn, like the other
RDNA archs), to the default-dtype table, and to the LDS-capacity table
(64 KiB per WGP) so the arch is dispatchable end-to-end.
Signed-off-by: xawang <xawang@amd.com>
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brunomazzottiamd
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LGTM!
@amd-xavierwang, can you please rebase on top of latest main branch? I think there are some CI failures in Aiter Test / Standard Tests suite that have already been fixed.
By this way, we can trigger CI again and then merge when everything is green.
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CI looks good now! |
I was trying to merge this in the last hour or so, but couldn't find an unresolved discussion... Now it's merged thanks to Satya! |
Motivation
fnuzfor dtype which should be changed totorch.float8_e4m3fn.GRID_MNis atl.constexprwhich makes Triton to trigger re-compile for its dependencies,MandN. For LLM, cold compiling for eachMin GEMM is not accepted.Changes
1.
aiter/ops/triton/utils/types.py— gfx11 fp8 dtypeAdd
gfx1100,gfx1101,gfx1102,gfx1151to the non-fnuz arch tuple in bothget_fp8_dtypes()andget_fp8_e4m3_dtype()→e4m3resolves totorch.float8_e4m3fnon gfx11.2.
aiter/ops/triton/configs/.../gemm_a8w8_blockscale/— tuned configsSix JSON files in the nested layout (#4927):
DEFAULT.jsonGEMM-A8W8_BLOCKSCALE-N=1536-K=4096.jsonGEMM-A8W8_BLOCKSCALE-N=512-K=4096.jsonGEMM-A8W8_BLOCKSCALE-N=4096-K=1024.jsonGEMM-A8W8_BLOCKSCALE-N=4096-K=256.jsonGEMM-A8W8_BLOCKSCALE-N=8192-K=1024.json3.
aiter/ops/triton/_triton_kernels/gemm/basic/gemm_a8w8_blockscale.py— remove M-dependentGRID_MNGRID_MNcauses M, N to become constexpr, causing a new JIT compile on every new M. This is not acceptable for LLM inference. The only usecase,remap_xcd(pid, GRID_MN)is also dead code.4. RDNA3/3.5 fp8 enablement
aiter/ops/triton/utils/types.pygfx1150to the non-fnuz arch tuple →e4m3resolves totorch.float8_e4m3fnaiter/utility/dtypes.py"gfx1150": {"fp8": torch.float8_e4m3fn}todefaultDtypes(see #4764 )aiter/jit/utils/chip_info.pygfx1150to_LDS_CAPACITY_BYTESat 64 KiB/WGP (also fills the missinggfx1101/gfx1102/gfx1200entries)Exercised through vLLM DeepSeek-V4-Flash serving on gfx1100 (TP=8, fp8 KV cache). Inference runs after adapting Aiter's backend.
Test Result
Submission Checklist
*** Honouring contribution to @saeid-rostami for identifying the default dtype and compilation regression.