[FlyDSL] jagged_dense_bmm_broadcast_add (MI300X) - #4136
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coderfeli
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coderfeli
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coderfeli
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coderfeli
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Address PR review feedback (ROCm#4136): ChunkK was hardcoded to _BLOCK_KV in the public flydsl_fp8_paged_mqa_logits call despite compile_fp8_paged_mqa_logits already accepting block_kv. Now ChunkK is forwarded, defaulting to _BLOCK_KV (128) and validated to be a multiple of MFMA_N before dispatch.
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Use the AITER MIT (C) 2026 header on the five new Python files, and remove test_jdbba_compile_reraise plus the block_k=32/256 ValueError assertions that the reviewer flagged as unnecessary. Co-authored-by: Cursor <cursoragent@cursor.com>
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Use the AITER MIT (C) 2026 header on the five new Python files, and remove test_jdbba_compile_reraise plus the block_k=32/256 ValueError assertions that the reviewer flagged as unnecessary. Co-authored-by: Cursor <cursoragent@cursor.com>
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Add grouped BF16 jagged_dense_bmm_broadcast_add with arch-keyed dispatch, skew TILE_MAP compact launches, gfx942 autotune winners (including production B64 D512 K1024 Mi8192), and correctness/perf tests. Co-authored-by: Cursor <cursoragent@cursor.com>
Co-authored-by: Cursor <cursoragent@cursor.com>
Co-authored-by: Cursor <cursoragent@cursor.com>
Merge dispatch routing and skew TILE_MAP coverage into the canonical op test and remove the redundant bench and flydsl test scripts. Co-authored-by: Cursor <cursoragent@cursor.com>
…TILE_MAP Co-authored-by: Cursor <cursoragent@cursor.com>
…tests Bound the AOT compile cache with LRU eviction, re-raise on flyc.compile failure, validate explicit block_k before launch, drop the unused skew tile-map path, and add regression tests for compile re-raise, block_k, and skew varying L. Co-authored-by: Cursor <cursoragent@cursor.com>
Drop the unread last-stage A LDS write and the duplicate pre-shuffle barrier. Compact skew now stores seq_start/seq_end in TILE_MAP so the main kernel does not chase SEQ_OFFSETS. Scheduler-hint knobs stay off by default. Co-authored-by: Cursor <cursoragent@cursor.com>
…hape. Co-authored-by: Cursor <cursoragent@cursor.com>
Replace the raw arith.ExtFOp/addf/trunc_f path with Vector +/.to(), and drop the unused C_FRAG_LEN. ISA is unchanged; the bias fragment is relabelled to the accumulator shape so Vector does not broadcast. Co-authored-by: Cursor <cursoragent@cursor.com>
Use the AITER MIT (C) 2026 header on the five new Python files, and remove test_jdbba_compile_reraise plus the block_k=32/256 ValueError assertions that the reviewer flagged as unnecessary. Co-authored-by: Cursor <cursoragent@cursor.com>
block_k and skew-varying-L now use @benchmark and run_perftest so their tables match the main sweep. -b/--batch supplies or overrides B on -s. Co-authored-by: Cursor <cursoragent@cursor.com>
Replace fx.Index loop bounds with fx.Int32, which is what the runtime for-loop lowering wants, and drop redundant fx.Int32 wraps around values that are already typed. Generated ISA is unchanged. Co-authored-by: Cursor <cursoragent@cursor.com>
Cache the per-config launcher in the bounded LRU and dispatch through tensor_shim._run_compiled, which already handles the compile-once path and cleans up the leaked ir.Context on failure. Co-authored-by: Cursor <cursoragent@cursor.com>
…or K. The 16x16x32 path, waves_per_eu, and never-read dispatch keys were never on for any production shape; floor-division of N and K used to silently drop a tail of the output or the reduction. Co-authored-by: Cursor <cursoragent@cursor.com>
cos/ms/speedup were autotune notes and were never read at launch. Co-authored-by: Cursor <cursoragent@cursor.com>
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Motivation
jagged_dense_bmm_broadcast_addis a grouped GEMM for recommendation-style workloads with variable per-group sequence lengths. For each groupbover its packed row slice[s, e):Group row boundaries come from a device-resident
seq_offsetsprefix-sum array — the host does not know each group's row count at launch, so the group→row mapping is resolved on the GPU. This rules out any stock batched-GEMM kernel.This PR adds a FlyDSL implementation for gfx942 (MI300X) that delivers ~1.3–1.6× over the
generative-recommendersTriton baseline on four headline deployment shapes (B120/B1024 × D256/D512,Mi=7680), plus a tuned winner for the production shapeB64 D512 KOUT1024 Mi8192.Files
aiter/ops/flydsl/kernels/jagged_dense_bmm_gen.pyaiter/ops/flydsl/kernels/jdbba_skew_tile_map.pyTILE_MAPprep for skew launchesaiter/ops/flydsl/kernels/_buffer_utils.pyaiter/ops/flydsl/jagged_dense_bmm_dispatch.pyjagged_dense_bmm_dispatched)aiter/ops/flydsl/jagged_dense_bmm_dispatch.jsongfx942)op_tests/test_jagged_dense_bmm.pyTechnical Details
What it computes
Each group
bmultiplies its jagged rows by a per-group dense weight matrix and adds a per-group bias. Row boundaries live inseq_offsetson the GPU — the kernel reads them at launch rather than relying on a fixed batch size.A(jagged)(L, K)bf16L = seq_offsets[-1])B(dense)(B·N, K)bf16N×Kweight panel per group, stacked tallBIAS(B·N,)bf16SEQ_OFFSETS(B+1,)int32C(out)(L, N)bf16Entry point:
jagged_dense_bmm_dispatched(C, A, B, BIAS, SEQ_OFFSETS, n_groups, max_seq_len, uniform_seqlen=...).Kernel overview
A tiled BF16 GEMM on MI300X using 16×16×16 MFMA. Default tile size is 128×128×64 with 256 threads.
flyc.compile; results are cached in a bounded LRU (cap 64). Compile failures clean up leakedir.Contextand re-raise (mirrorsmoe_kernels._run_compiled).Two launch modes
(group, M-tile, N-tile)TILE_MAPon device listing only occupied tiles; skip empty workFor skewed lengths, a fused prep kernel scans
seq_offsets, fills a compact tile list (with sentinels for padding), and the main kernel iterates that list instead of launching empty blocks.Tuning and dispatch
Per-shape settings (XCD grid remap, thread count, MFMA variant,
block_k) are stored injagged_dense_bmm_dispatch.jsonundergfx942. Dispatch picks config in order:B{n}D{K}K{N}N{max_seq_len}Key tuning choices on gfx942:
BLOCK_K=64— keeps LDS usage low enough for good occupancy (vs 128, which fills 64 KB and halves occupancy).threads=512— helps D256 uniform shapes by reducing register pressure; D512 and skew stay at 256.(xcd_c, xcd_w)winners in JSON. Uniform and compact (skew) paths share one_xcd_remaphelper.block_koverride — wired through dispatch JSON; explicit values are validated before compile (multiple of 32, ≥64 for default MFMA path, LDS fit,K % block_k == 0). Supported values for typical shapes: 64, 128.Override JSON path:
FLYDSL_JAGGED_DENSE_BMM_DISPATCH_JSON. Force arch section:FLYDSL_JAGGED_DENSE_BMM_ARCH.Review fixes
Addressed reviewer feedback (
coderfeli):_xcd_remap/_xcd_remap_compactinto one shared helper (compile-time vs runtimenum_rows).functools.lru_cacheon the launcher withflyc.compile+ bounded LRU cache.jdbba_skew_tile_map.pyto idiomatic FlyDSL (buffer_ops, loop-carriedrange) — removed raw MLIR (scf/arith/InsertionPoint).build_tile_map_device, scatter launcher).block_kfully through dispatch; added fail-fast validation and regression tests.Test Plan
MI300X (gfx942), ROCm 6.x+. Requires
aiter,flydsl≥0.2.4, and the baseline Triton kernel fromgenerative-recommendersonPYTHONPATH.The op test verifies:
checkAllclosevs torch reference,err=0).M_b=0), partial tiles,max_seq_len >> mean— via compactTILE_MAP.test_jdbba_dispatch).block_k=128correctness and fail-fastValueErrorfor invalidblock_k(test_jdbba_block_k).Lacross differentseq_offsets(test_jdbba_skew_varying_L).flyc.compilefailure re-raises without poisoning the compile cache (test_jdbba_compile_reraise).Test Results
MI300X gfx942, ROCm 7.2, FlyDSL 0.2.4, Triton 3.7.0.
run_perftesttiming,checkAllclose(err=0) all shapes/regimes.Baseline:
generative_recommenders.ops.triton.triton_jagged.triton_jagged_dense_bmm_add_fwd.Uniform regime (every group
M_i = Mi)Production uniform (
B64,M_total=524288): JSON winnerxcd_c=240,xcd_w=4.Skew regime (~20% empty groups, one full-envelope, one near-full)
Production skew (
B64): compactTILE_MAPwith_skew_compact_xcdremap (xcd_c=32,xcd_w=8,D≥512).