[draft] flydsl mxfp4 gemm2: pipeline fp4-out epilog LDS reads (lgkmcnt -68%, … - #3840
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coderfeli merged 1 commit intoJun 22, 2026
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…gemm2 846->778us @ M=16384)
benenzhu
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June 22, 2026 06:38
coderfeli
marked this pull request as ready for review
June 22, 2026 06:48
ColorsWind
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Jun 22, 2026
…3861 conflicts) Base (dev/randomflow_pr) rewrote fused_moe.py (~1340 lines); this branch's only fused_moe.py change is the "gate gemm2 mxfp4-out solely on AITER_MXFP4_INTERMEDIATE" commit. Resolution: - aiter/fused_moe.py: take base's rewritten structure, re-apply the single semantic change -- drop the `mxfp4out and` term from the mxfp4-out gate in _mxfp4_a4w4_stage2 so it gates on AITER_MXFP4_INTERMEDIATE=="1" alone. - aiter/ops/flydsl/kernels/mxfp4_gemm2.py: keep this branch's abs-fold epilog (llvm.fabs.f32 + maxnumf amax); drop base's now-dead `i7fff` integer-mask declaration. The ROCm#3840 LDS pipelining is identical on both sides.
Contributor
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Performance regression between e90d47f and 46ecc44, |
Contributor
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Original performance:
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Contributor
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Hi @fsx950223 , The regression seems to be caused by our recent code refactor. The latest code in randomflow_pr branch should align with the previous flydsl performance (though not 100% sure). Here is the result in randomflow_pr branch, the test script is bench.py. Test Results
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Contributor
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dsv4_tp8 should use a4w4-port too |
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gemm2 846->778us @ M=16384)
3% e2e for fp4-out path.
eleminate the back2back stall of 2xds_read & lgkmcnt(1) issue.