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fix(minimax-m3): enable per-token FP8 KV on gfx1250 - #2614
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Co-authored-by: Cursor <cursoragent@cursor.com>
Co-authored-by: Cursor <cursoragent@cursor.com>
Co-authored-by: Cursor <cursoragent@cursor.com>
🏷️ CI GuideRuns automatically on every eligible PR before approval:
Heavy model tests:
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GPU follow-up on C5 (4×MI455, TP4, |
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Final MI455 TP4 correctness gate passes under CUDA graph: GSM8K 5-shot 1319/1319, 0.9378 flexible / 0.9386 strict, within 0.1pp of the BF16-KV baseline. Graph replay and Performance guardrail does not pass: random 8K/1K c4 is |
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Superseded by #2710: FlyDSL paged decode handles MiniMax-M3 per-token FP8 KV on gfx1250 (full GSM8K 0.9348) and skips |
Problem
MiniMax-M3 writes page-shuffled FP8 KV plus per-token K/V scales. On gfx1250, the unified fallback cannot consume those scales, and sparse prefill attempts a missing FP8
pa_fwdASM code object and aborts the worker. The verified MI455 baseline therefore has to use BF16 KV.Change
Depends on ATOM #2594 and AITER #6625.
Validation
MI455/gfx1250, TP4, MiniMax-M3-MXFP4 with
--kv_cache_dtype fp8:17 * 23:3917/8; BF16 control is8/8, so full accuracy validation is still open and this PR remains DraftNo performance claim is made yet.