sam0_common: make Timer implementation common across all sam0 MCUs

The currently supported SAM0 MCUs (samd21, saml21, saml1x) share the same Timer peripheral, yet each of them carries it's own copy of the Timer driver. This introduces a new timer driver that is common for all sam0 MCUs and uses structs for configuration instead of defines.
RIOT-OS · May 20, 2019 · 6441607 · 6441607
1 parent c439346
commit 6441607
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Showing 22 changed files with 710 additions and 977 deletions.
diff --git a/boards/arduino-zero/include/board.h b/boards/arduino-zero/include/board.h
@@ -33,7 +33,7 @@ extern "C" {
  * @name    xtimer configuration
  * @{
  */
-#define XTIMER              TIMER_DEV(1)
+#define XTIMER_DEV          TIMER_DEV(1)
 #define XTIMER_CHAN         (0)
 /** @} */
 

diff --git a/boards/arduino-zero/include/periph_conf.h b/boards/arduino-zero/include/periph_conf.h
@@ -83,22 +83,44 @@ extern "C" {
  * @name Timer peripheral configuration
  * @{
  */
-#define TIMER_NUMOF         (2U)
-#define TIMER_0_EN          1
-#define TIMER_1_EN          1
+static const tc32_conf_t timer_config[] = {
+    {   /* Timer 0 - System Clock */
+        .dev            = TC3,
+        .irq            = TC3_IRQn,
+        .pm_mask        = PM_APBCMASK_TC3,
+        .gclk_ctrl      = GCLK_CLKCTRL_ID_TCC2_TC3,
+#if CLOCK_USE_PLL || CLOCK_USE_XOSC32_DFLL
+        .gclk_src       = GCLK_CLKCTRL_GEN(1),
+        .prescaler      = TC_CTRLA_PRESCALER_DIV1,
+#else
+        .gclk_src       = GCLK_CLKCTRL_GEN(0),
+        .prescaler      = TC_CTRLA_PRESCALER_DIV8,
+#endif
+        .flags          = TC_CTRLA_MODE_COUNT16,
+    },
+    {   /* Timer 1 */
+        .dev            = TC4,
+        .irq            = TC4_IRQn,
+        .pm_mask        = PM_APBCMASK_TC4 | PM_APBCMASK_TC5,
+        .gclk_ctrl      = GCLK_CLKCTRL_ID_TC4_TC5,
+#if CLOCK_USE_PLL || CLOCK_USE_XOSC32_DFLL
+        .gclk_src       = GCLK_CLKCTRL_GEN(1),
+        .prescaler      = TC_CTRLA_PRESCALER_DIV1,
+#else
+        .gclk_src       = GCLK_CLKCTRL_GEN(0),
+        .prescaler      = TC_CTRLA_PRESCALER_DIV8,
+#endif
+        .flags          = TC_CTRLA_MODE_COUNT32,
+    }
+};
 
-/* Timer 0 configuration */
-#define TIMER_0_DEV         TC3->COUNT16
-#define TIMER_0_CHANNELS    2
-#define TIMER_0_MAX_VALUE   (0xffff)
-#define TIMER_0_ISR         isr_tc3
+#define TIMER_0_MAX_VALUE   0xffff
 
-/* Timer 1 configuration */
-#define TIMER_1_DEV         TC4->COUNT32
-#define TIMER_1_CHANNELS    2
-#define TIMER_1_MAX_VALUE   (0xffffffff)
+/* interrupt function name mapping */
+#define TIMER_0_ISR         isr_tc3
 #define TIMER_1_ISR         isr_tc4
 
+#define TIMER_NUMOF         (sizeof(timer_config) / sizeof(timer_config[0]))
 /** @} */
 
 /**

diff --git a/boards/common/arduino-mkr/include/periph_conf.h b/boards/common/arduino-mkr/include/periph_conf.h
@@ -81,21 +81,44 @@ extern "C" {
  * @name Timer peripheral configuration
  * @{
  */
-#define TIMER_NUMOF         (2U)
-#define TIMER_0_EN          1
-#define TIMER_1_EN          1
+static const tc32_conf_t timer_config[] = {
+    {   /* Timer 0 - System Clock */
+        .dev            = TC3,
+        .irq            = TC3_IRQn,
+        .pm_mask        = PM_APBCMASK_TC3,
+        .gclk_ctrl      = GCLK_CLKCTRL_ID_TCC2_TC3,
+#if CLOCK_USE_PLL || CLOCK_USE_XOSC32_DFLL
+        .gclk_src       = GCLK_CLKCTRL_GEN(1),
+        .prescaler      = TC_CTRLA_PRESCALER_DIV1,
+#else
+        .gclk_src       = GCLK_CLKCTRL_GEN(0),
+        .prescaler      = TC_CTRLA_PRESCALER_DIV8,
+#endif
+        .flags          = TC_CTRLA_MODE_COUNT16,
+    },
+    {   /* Timer 1 */
+        .dev            = TC4,
+        .irq            = TC4_IRQn,
+        .pm_mask        = PM_APBCMASK_TC4 | PM_APBCMASK_TC5,
+        .gclk_ctrl      = GCLK_CLKCTRL_ID_TC4_TC5,
+#if CLOCK_USE_PLL || CLOCK_USE_XOSC32_DFLL
+        .gclk_src       = GCLK_CLKCTRL_GEN(1),
+        .prescaler      = TC_CTRLA_PRESCALER_DIV1,
+#else
+        .gclk_src       = GCLK_CLKCTRL_GEN(0),
+        .prescaler      = TC_CTRLA_PRESCALER_DIV8,
+#endif
+        .flags          = TC_CTRLA_MODE_COUNT32,
+    }
+};
 
-/* Timer 0 configuration */
-#define TIMER_0_DEV         TC3->COUNT16
-#define TIMER_0_CHANNELS    2
-#define TIMER_0_MAX_VALUE   (0xffff)
-#define TIMER_0_ISR         isr_tc3
+#define TIMER_0_MAX_VALUE   0xffff
 
-/* Timer 1 configuration */
-#define TIMER_1_DEV         TC4->COUNT32
-#define TIMER_1_CHANNELS    2
-#define TIMER_1_MAX_VALUE   (0xffffffff)
+/* interrupt function name mapping */
+#define TIMER_0_ISR         isr_tc3
 #define TIMER_1_ISR         isr_tc4
+
+#define TIMER_NUMOF         (sizeof(timer_config) / sizeof(timer_config[0]))
 /** @} */
 
 /**

diff --git a/boards/common/saml1x/include/periph_conf.h b/boards/common/saml1x/include/periph_conf.h
@@ -35,14 +35,23 @@ extern "C" {
  * @name    Timer peripheral configuration
  * @{
  */
-#define TIMER_NUMOF        (1U)
-#define TIMER_0_EN         1
+static const tc32_conf_t timer_config[] = {
+    {   /* Timer 0 - System Clock */
+        .dev            = TC0,
+        .irq            = TC0_IRQn,
+        .mclk           = &MCLK->APBCMASK.reg,
+        .mclk_mask      = MCLK_APBCMASK_TC0 | MCLK_APBCMASK_TC1,
+        .gclk_id        = TC0_GCLK_ID,
+        .gclk_src       = GCLK_PCHCTRL_GEN(0),
+        .prescaler      = TC_CTRLA_PRESCALER(4),
+        .flags          = TC_CTRLA_MODE_COUNT32,
+    }
+};
 
 /* Timer 0 configuration */
-#define TIMER_0_DEV        TC0->COUNT32
-#define TIMER_0_CHANNELS   1
-#define TIMER_0_MAX_VALUE  (0xffffffff)
-#define TIMER_0_ISR        isr_tc0
+#define TIMER_0_CHANNELS    2
+#define TIMER_0_ISR         isr_tc0
+#define TIMER_NUMOF         (sizeof(timer_config)/sizeof(timer_config[0]))
 /** @} */
 
 /**

diff --git a/boards/feather-m0/include/periph_conf.h b/boards/feather-m0/include/periph_conf.h
@@ -78,21 +78,44 @@ extern "C" {
  * @name    Timer peripheral configuration
  * @{
  */
-#define TIMER_NUMOF         (2U)
-#define TIMER_0_EN          1
-#define TIMER_1_EN          1
-
-/* Timer 0 configuration */
-#define TIMER_0_DEV         TC3->COUNT16
-#define TIMER_0_CHANNELS    2
-#define TIMER_0_MAX_VALUE   (0xffff)
-#define TIMER_0_ISR         isr_tc3
+static const tc32_conf_t timer_config[] = {
+    {   /* Timer 0 - System Clock */
+        .dev            = TC3,
+        .irq            = TC3_IRQn,
+        .pm_mask        = PM_APBCMASK_TC3,
+        .gclk_ctrl      = GCLK_CLKCTRL_ID_TCC2_TC3,
+#if CLOCK_USE_PLL || CLOCK_USE_XOSC32_DFLL
+        .gclk_src       = GCLK_CLKCTRL_GEN(1),
+        .prescaler      = TC_CTRLA_PRESCALER_DIV1,
+#else
+        .gclk_src       = GCLK_CLKCTRL_GEN(0),
+        .prescaler      = TC_CTRLA_PRESCALER_DIV8,
+#endif
+        .flags          = TC_CTRLA_MODE_COUNT16,
+    },
+    {   /* Timer 1 */
+        .dev            = TC4,
+        .irq            = TC4_IRQn,
+        .pm_mask        = PM_APBCMASK_TC4 | PM_APBCMASK_TC5,
+        .gclk_ctrl      = GCLK_CLKCTRL_ID_TC4_TC5,
+#if CLOCK_USE_PLL || CLOCK_USE_XOSC32_DFLL
+        .gclk_src       = GCLK_CLKCTRL_GEN(1),
+        .prescaler      = TC_CTRLA_PRESCALER_DIV1,
+#else
+        .gclk_src       = GCLK_CLKCTRL_GEN(0),
+        .prescaler      = TC_CTRLA_PRESCALER_DIV8,
+#endif
+        .flags          = TC_CTRLA_MODE_COUNT32,
+    }
+};
+
+#define TIMER_0_MAX_VALUE   0xffff
 
-/* Timer 1 configuration */
-#define TIMER_1_DEV         TC4->COUNT32
-#define TIMER_1_CHANNELS    2
-#define TIMER_1_MAX_VALUE   (0xffffffff)
+/* interrupt function name mapping */
+#define TIMER_0_ISR         isr_tc3
 #define TIMER_1_ISR         isr_tc4
+
+#define TIMER_NUMOF         (sizeof(timer_config) / sizeof(timer_config[0]))
 /** @} */
 
 /**

diff --git a/boards/hamilton/include/periph_conf.h b/boards/hamilton/include/periph_conf.h
@@ -113,21 +113,44 @@ extern "C" {
  * @name    Timer peripheral configuration
  * @{
  */
-#define TIMER_NUMOF         (2U)
-#define TIMER_0_EN          1
-#define TIMER_1_EN          1
-
-/* Timer 0 configuration */
-#define TIMER_0_DEV         TC3->COUNT16
-#define TIMER_0_CHANNELS    2
-#define TIMER_0_MAX_VALUE   (0xffff)
-#define TIMER_0_ISR         isr_tc3
+static const tc32_conf_t timer_config[] = {
+    {   /* Timer 0 - System Clock */
+        .dev            = TC3,
+        .irq            = TC3_IRQn,
+        .pm_mask        = PM_APBCMASK_TC3,
+        .gclk_ctrl      = GCLK_CLKCTRL_ID_TCC2_TC3,
+#if CLOCK_USE_PLL || CLOCK_USE_XOSC32_DFLL
+        .gclk_src       = GCLK_CLKCTRL_GEN(1),
+        .prescaler      = TC_CTRLA_PRESCALER_DIV1,
+#else
+        .gclk_src       = GCLK_CLKCTRL_GEN(0),
+        .prescaler      = TC_CTRLA_PRESCALER_DIV8,
+#endif
+        .flags          = TC_CTRLA_MODE_COUNT16,
+    },
+    {   /* Timer 1 */
+        .dev            = TC4,
+        .irq            = TC4_IRQn,
+        .pm_mask        = PM_APBCMASK_TC4 | PM_APBCMASK_TC5,
+        .gclk_ctrl      = GCLK_CLKCTRL_ID_TC4_TC5,
+#if CLOCK_USE_PLL || CLOCK_USE_XOSC32_DFLL
+        .gclk_src       = GCLK_CLKCTRL_GEN(1),
+        .prescaler      = TC_CTRLA_PRESCALER_DIV1,
+#else
+        .gclk_src       = GCLK_CLKCTRL_GEN(0),
+        .prescaler      = TC_CTRLA_PRESCALER_DIV8,
+#endif
+        .flags          = TC_CTRLA_MODE_COUNT32,
+    }
+};
+
+#define TIMER_0_MAX_VALUE   0xffff
 
-/* Timer 1 configuration */
-#define TIMER_1_DEV         TC4->COUNT32
-#define TIMER_1_CHANNELS    2
-#define TIMER_1_MAX_VALUE   (0xffffffff)
+/* interrupt function name mapping */
+#define TIMER_0_ISR         isr_tc3
 #define TIMER_1_ISR         isr_tc4
+
+#define TIMER_NUMOF         (sizeof(timer_config) / sizeof(timer_config[0]))
 /** @} */
 
 /**

diff --git a/boards/samd21-xpro/include/board.h b/boards/samd21-xpro/include/board.h
@@ -32,7 +32,7 @@ extern "C" {
 #endif
 
 /**
- * @name   xtimer configuration
+ * @name    xtimer configuration
  * @{
  */
 #define XTIMER_DEV          TIMER_DEV(1)

diff --git a/boards/samd21-xpro/include/periph_conf.h b/boards/samd21-xpro/include/periph_conf.h
@@ -89,21 +89,44 @@ extern "C" {
  * @name Timer peripheral configuration
  * @{
  */
-#define TIMER_NUMOF         (2U)
-#define TIMER_0_EN          1
-#define TIMER_1_EN          1
+static const tc32_conf_t timer_config[] = {
+    {   /* Timer 0 - System Clock */
+        .dev            = TC3,
+        .irq            = TC3_IRQn,
+        .pm_mask        = PM_APBCMASK_TC3,
+        .gclk_ctrl      = GCLK_CLKCTRL_ID_TCC2_TC3,
+#if CLOCK_USE_PLL || CLOCK_USE_XOSC32_DFLL
+        .gclk_src       = GCLK_CLKCTRL_GEN(1),
+        .prescaler      = TC_CTRLA_PRESCALER_DIV1,
+#else
+        .gclk_src       = GCLK_CLKCTRL_GEN(0),
+        .prescaler      = TC_CTRLA_PRESCALER_DIV8,
+#endif
+        .flags          = TC_CTRLA_MODE_COUNT16,
+    },
+    {   /* Timer 1 */
+        .dev            = TC4,
+        .irq            = TC4_IRQn,
+        .pm_mask        = PM_APBCMASK_TC4 | PM_APBCMASK_TC5,
+        .gclk_ctrl      = GCLK_CLKCTRL_ID_TC4_TC5,
+#if CLOCK_USE_PLL || CLOCK_USE_XOSC32_DFLL
+        .gclk_src       = GCLK_CLKCTRL_GEN(1),
+        .prescaler      = TC_CTRLA_PRESCALER_DIV1,
+#else
+        .gclk_src       = GCLK_CLKCTRL_GEN(0),
+        .prescaler      = TC_CTRLA_PRESCALER_DIV8,
+#endif
+        .flags          = TC_CTRLA_MODE_COUNT32,
+    }
+};
 
-/* Timer 0 configuration */
-#define TIMER_0_DEV         TC3->COUNT16
-#define TIMER_0_CHANNELS    2
-#define TIMER_0_MAX_VALUE   (0xffff)
-#define TIMER_0_ISR         isr_tc3
+#define TIMER_0_MAX_VALUE   0xffff
 
-/* Timer 1 configuration */
-#define TIMER_1_DEV         TC4->COUNT32
-#define TIMER_1_CHANNELS    2
-#define TIMER_1_MAX_VALUE   (0xffffffff)
+/* interrupt function name mapping */
+#define TIMER_0_ISR         isr_tc3
 #define TIMER_1_ISR         isr_tc4
+
+#define TIMER_NUMOF         (sizeof(timer_config) / sizeof(timer_config[0]))
 /** @} */
 
 /**

diff --git a/boards/saml21-xpro/include/periph_conf.h b/boards/saml21-xpro/include/periph_conf.h
@@ -38,14 +38,23 @@ extern "C" {
  * @name    Timer peripheral configuration
  * @{
  */
-#define TIMER_NUMOF        (1U)
-#define TIMER_0_EN         1
+static const tc32_conf_t timer_config[] = {
+    {   /* Timer 0 - System Clock */
+        .dev            = TC0,
+        .irq            = TC0_IRQn,
+        .mclk           = &MCLK->APBCMASK.reg,
+        .mclk_mask      = MCLK_APBCMASK_TC0 | MCLK_APBCMASK_TC1,
+        .gclk_id        = TC0_GCLK_ID,
+        .gclk_src       = GCLK_PCHCTRL_GEN(0),
+        .prescaler      = TC_CTRLA_PRESCALER(4),
+        .flags          = TC_CTRLA_MODE_COUNT32,
+    }
+};
 
 /* Timer 0 configuration */
-#define TIMER_0_DEV        TC0->COUNT32
-#define TIMER_0_CHANNELS   1
-#define TIMER_0_MAX_VALUE  (0xffffffff)
-#define TIMER_0_ISR        isr_tc0
+#define TIMER_0_CHANNELS    2
+#define TIMER_0_ISR         isr_tc0
+#define TIMER_NUMOF         (sizeof(timer_config)/sizeof(timer_config[0]))
 /** @} */
 
 /**
-Original file line number
+Diff line change
@@ Expand Up / @@ -32,7 +32,7 @@ extern "C" { @@
     #endif
     /**
-     * @name   xtimer configuration
+     * @name    xtimer configuration
      * @{
      */
     #define XTIMER_DEV          TIMER_DEV(1)
@@ Expand Down @@