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system:freertos:zynqmp_r5: correct io mem mapping
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This fix is to workaround the memory mapping in for ZynqMP_R5.

The root cause is in the libxil.a MPU region setting.
The base address for the region setitng in libxil is
calculated as this:

region_base = addr & ~(region_size - 1);
This will cause issue if the input addr address is
in the end of the region.

Signed-off-by: Wendy Liang <[email protected]>
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wjliang committed Mar 1, 2017
1 parent 2a0c116 commit 51e08c6
Showing 1 changed file with 17 additions and 1 deletion.
18 changes: 17 additions & 1 deletion lib/system/freertos/zynqmp_r5/sys.c
Original file line number Diff line number Diff line change
Expand Up @@ -43,6 +43,7 @@
#include "metal/io.h"
#include "metal/sys.h"

#define MPU_REGION_SIZE_MIN 0x20

static unsigned int int_old_val = 0;

Expand Down Expand Up @@ -91,6 +92,8 @@ void metal_machine_io_mem_map(metal_phys_addr_t pa,
size_t size, unsigned int flags)
{
unsigned int r5_flags;
size_t rsize = MPU_REGION_SIZE_MIN;
metal_phys_addr_t base_pa;

/* Assume DEVICE_SHARED if nothing indicates this is memory. */
r5_flags = DEVICE_SHARED;
Expand All @@ -110,6 +113,19 @@ void metal_machine_io_mem_map(metal_phys_addr_t pa,
}
}

Xil_SetMPURegion(pa, size, r5_flags | PRIV_RW_USER_RW);
while(1) {
if (rsize < size) {
rsize <<= 1;
continue;
} else {
base_pa = pa & ~(rsize - 1);
if ((base_pa + rsize) < (pa + size)) {
rsize <<= 1;
continue;
}
break;
}
}
Xil_SetMPURegion(base_pa, rsize, r5_flags | PRIV_RW_USER_RW);
return;
}

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