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core: arm: runtime check for CE #6645
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"core: arm: add masks for ID_ISAR5 fields":
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Comments on "core: arm: add helper for reading isar5".
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"lib: libutee: define read function for id_isar5" should be "core: arm64: define read function for id_isar5". With that, this commit is:
Reviewed-by: Jerome Forissier <[email protected]>
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Typo in commit message for "core: arm64: add masks for ID_AA64ISAR0_EL1 fields":
-RDM - [31:68]
+RDM - [31:28]
For commit "core: arm: kernel: add runtime check for CE": maybe explicitly say in the commit message for core will panic if configuration enables an Arm CE feature that the hardware does not support.
Aside the minor comments:
Acked-by: Etienne Carriere <[email protected]>
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@jforissier @jenswi-linaro @etienne-lms addressed all comments, applied Etienne's A-b tag |
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Some typos i've missed.
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- For "core: arm64: add masks for ID_AA64ISAR0_EL1 fields" with Etienne's comment addressed:
Acked-by: Jerome Forissier <[email protected]>
- For "core: arm: add helper functions for checking CE support":
Reviewed-by: Jerome Forissier <[email protected]>
More comments below.
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- Commit "core: arm: rewrite feat_crc32_implemented":
Add parentheses after function name:feat_crc32_implemented()
in subject and commit description.
With that:
Reviewed-by: Jerome Forissier <[email protected]>
- Commit "core: arm64: remove ID_AA64ISAR0_EL1 macros":
Reviewed-by: Jerome Forissier <[email protected]>
- Commit "core: arm: add check in aarch32 for feat_crc32_implemented":
Add missing parentheses, then:
Reviewed-by: Jerome Forissier <[email protected]>
- Commit "core: arm: add helper functions for checking CE support":
Reviewed-by: Jerome Forissier <[email protected]>
Plus one comment on the last commit. Thanks!
For "core: arm: kernel: add runtime check for CE": |
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@jforissier tags applied |
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rebased onto the latest master |
@jenswi-linaro @jforissier @etienne-lms any additional comments/objections? |
The Xen CI job has failed, I have restarted it but I suspect there might be an issue with the access to the config registers... |
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Look all good to me.
My R-b tag for the commits I've not given a review tag yet, FWIW (@jforissier, please merge staright, you've already acked these and that's far enough)
@etienne-lms I will give @jenswi-linaro the opportunity to comment further since he has reviewed already. |
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Add masks for obtaining Crypto Extensions support status from ID_ISAR5_EL1 register: Algo Bits CRC32 - [19:16] SHA2 - [15:12] SHA1 - [11:8] AES - [7:4] For additional details check ARM Architecture Reference Manual for ARMv8-A architecture profile. D10.2.66 ID_ISAR5_EL1, AArch32 Instruction Set Attribute Register 5 Reviewed-by: Jerome Forissier <[email protected]> Acked-by: Etienne Carriere <[email protected]> Acked-by: Jens Wiklander <[email protected]> Signed-off-by: Igor Opaniuk <[email protected]>
Add masks for obtaining Crypto Extensions support status from ID_AA64ISAR0_EL1 register: Algo Bits SM4 - [43:40] SM3 - [39:36] SHA3 - [35:32] RDM - [31:28] TME - [27:24] Atomic - [23:20] CRC32 - [19:16] SHA2 - [15:12] SHA1 - [11:8] AES - [7:4] For additional details check ARM Architecture Reference Manual for ARMv8-A architecture profile. ID_AA64ISAR0_EL1, AArch64 Instruction Set Attribute Register 0. Acked-by: Etienne Carriere <[email protected]> Acked-by: Jerome Forissier <[email protected]> Acked-by: Jens Wiklander <[email protected]> Signed-off-by: Igor Opaniuk <[email protected]>
Rewrite check in feat_crc32_implementedfor for ARM64. Reviewed-by: Jerome Forissier <[email protected]> Acked-by: Jens Wiklander <[email protected]> Signed-off-by: Igor Opaniuk <[email protected]>
Remove old definitions for ID_AA64ISAR0_EL1 CRC32 bitmask and shift. Reviewed-by: Jerome Forissier <[email protected]> Acked-by: Jens Wiklander <[email protected]> Signed-off-by: Igor Opaniuk <[email protected]>
Add support for checking CRC32 HW instruction in aarch32. Reviewed-by: Jerome Forissier <[email protected]> Acked-by: Jens Wiklander <[email protected]> Signed-off-by: Igor Opaniuk <[email protected]>
Add helper functions for checking implementation of SHA1, SHA256, SHA512, SHA3, SM3, SM4 instructions. Acked-by: Etienne Carriere <[email protected]> Reviewed-by: Jerome Forissier <[email protected]> Acked-by: Jens Wiklander <[email protected]> Signed-off-by: Igor Opaniuk <[email protected]>
Add runtime check during boot for supported ARMv8 Crypto Extensions. Core will panic if configuration enables an ARMv8 CE feature that the hardware does not support. Link: OP-TEE#6631 Acked-by: Etienne Carriere <[email protected]> Reviewed-by: Jerome Forissier <[email protected]> Acked-by: Jens Wiklander <[email protected]> Signed-off-by: Igor Opaniuk <[email protected]>
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@jenswi-linaro tag applied, thanks |
Thanks @igoropaniuk! |
Add runtime check during boot for Crypto Extensions if CFG_CRYPTO_WITH_CE=y.