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[1.28.0-rc] Gate the packed-FP4 wgrad layout workaround on cutlass-dsl < 4.8 - #764

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Anerudhan merged 3 commits into
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Anerudhan:fix-fp4-wgrad-dsl48-gate-1.28
Aug 26, 2026
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[1.28.0-rc] Gate the packed-FP4 wgrad layout workaround on cutlass-dsl < 4.8#764
Anerudhan merged 3 commits into
NVIDIA:1.28.0-rcfrom
Anerudhan:fix-fp4-wgrad-dsl48-gate-1.28

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@Anerudhan

@Anerudhan Anerudhan commented Aug 26, 2026

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Cherry-pick of all three commits from #763 onto 1.28.0-rc: the gate fix, the comment trim, and the black formatting of test_grouped_gemm_glu_hadamard_quant.py (so the pre-commit --all-files check passes on this branch too).

Problem / root cause

BlockScaledMoEGroupedGemmWgradKernel applies a packed-FP4 from_dlpack layout workaround (cute.recast_layout(4, 8, ...) on the A/B layouts) gated only on the internal cutlass-dsl wheel not being installed. Public cutlass-dsl wheels < 4.8 need it, but the 4.8.0a0 public wheels adopted native sub-byte layout semantics, so the recast double-corrects: every fp4 wgrad test fails with ~94% mismatched output (21 tests on the Blackwell nightly oss:rel:cutlass_dsl_4.8 shard1), occasionally escalating to an illegal memory access that cascades into unrelated test ERRORs.

Fix

Gate the workaround on the cutlass-dsl version (< 4.8) instead of only on internal-wheel presence. sm_107 and internal-wheel behavior unchanged; behavior on 4.5–4.7 public wheels unchanged (gate stays ON).

Verification (done on #763, same patch)

  • Local sm100, dense compile_execute fp4 sf_e4m3, mma 128x128/256x128, cluster 1x1/2x1: bit-exact (0/491520 mismatched) on cutlass-dsl 4.7.0 (gate ON) and 4.8.0a0+20260823210556.ac70faa (gate OFF); without the fix, 4.8 fails at ~94% mismatch.
  • Internal CI replay (MR !2355) with oss:rel pointed at the 4.8.0a0 prerelease: all four jobs green; Blackwell shard1 went from 21 failed to 910 passed, 0 failed.

🤖 Generated with Claude Code

Anerudhan and others added 2 commits August 26, 2026 11:26
Public cutlass-dsl wheels before 4.8 interpret packed sub-byte
from_dlpack layouts in byte units, so BlockScaledMoEGroupedGemmWgradKernel
recasts the FP4 A/B layouts to element units. The 4.8.0a0 public wheels
adopted the internal wheel's native sub-byte layout semantics, so the
recast now double-corrects: the MMA consumes byte-aliased data and every
fp4 wgrad test fails with ~94% mismatched output (and occasionally an
illegal memory access from the corrupted discrete-pointer TMA path).

Gate the workaround on the cutlass-dsl version instead of only on
internal-wheel presence.

Verified on sm100 (torch 2.13, dense compile_execute fp4 sf_e4m3, mma
128x128/256x128, cluster 1x1/2x1): bit-exact vs the torch reference on
both cutlass-dsl 4.7.0 (gate on) and 4.8.0a0+20260823210556.ac70faa
(gate off); before this change 4.8 fails with ~94% mismatch.

Co-Authored-By: Claude Fable 5 <noreply@anthropic.com>
Co-Authored-By: Claude Fable 5 <noreply@anthropic.com>
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@Anerudhan Anerudhan added this to the Frontend 1.28.0 milestone Aug 26, 2026
The pre-commit GitHub Action runs black on --all-files and this
pre-existing file was not black-clean, failing the check for every PR.

Co-Authored-By: Claude Fable 5 <noreply@anthropic.com>
@Anerudhan Anerudhan self-assigned this Aug 26, 2026
@Anerudhan Anerudhan added mod-frontend cuDNN frontend APIs, operation graph construction, plans, and user-facing wrappers. orig-nv-eng Reported or requested by NVIDIA engineering. cat-bugfix labels Aug 26, 2026
@Anerudhan
Anerudhan merged commit 76f7248 into NVIDIA:1.28.0-rc Aug 26, 2026
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@Anerudhan Anerudhan mentioned this pull request Sep 2, 2026
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