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@chuangz0 chuangz0 commented Oct 13, 2025

Summary by CodeRabbit

  • New Features
    • Buffer pre-allocation now aligns to tokens-per-block for more accurate and efficient memory usage.
  • Refactor
    • Updated public API to require a tokens_per_block parameter for pre-allocation utilities across native and Python interfaces.
    • Internal calculations now cap and align window sizes to token blocks for consistent sizing.
  • Tests
    • Unit tests updated to reflect the new parameter and sizing behavior.

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@chuangz0 chuangz0 requested a review from a team as a code owner October 13, 2025 10:37
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@chuangz0 chuangz0 changed the title [None][Fix] Fix cache_buffer_size for window [None][Fix] Fix cache buffer size for window Oct 13, 2025
@chuangz0 chuangz0 requested review from Shixiaowei02 and removed request for Tabrizian and pcastonguay October 13, 2025 10:38
@chuangz0 chuangz0 changed the title [None][Fix] Fix cache buffer size for window [None][fix] Fix cache buffer size for window Oct 13, 2025
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📝 Walkthrough

Walkthrough

The change adds a tokens-per-block parameter to preAllocBufferSize and updates all call sites/bindings. Buffer size computation now aligns window size to token blocks, caps by max tokens, and may add an extra block when misaligned. Tests and both C++ and Python bindings are adjusted accordingly.

Changes

Cohort / File(s) Summary
Core buffer sizing logic and API
cpp/tensorrt_llm/batch_manager/cacheTransBuffer.h, cpp/tensorrt_llm/batch_manager/cacheTransBuffer.cpp
Added size_t tokensPerBlock to preAllocBufferSize signature. Implemented alignedWindowSize and validTokenNum calculation with block alignment, max token cap, and optional extra block when window is misaligned. Propagated new parameter usage internally.
C++ caller update
cpp/tensorrt_llm/batch_manager/trtGptModelInflightBatching.cpp
Updated preAllocBufferSize invocation to pass mModelConfig.getTokensPerBlock(), reorder args accordingly.
C++ bindings (nanobind)
cpp/tensorrt_llm/nanobind/batch_manager/cacheTransceiver.cpp
Exposed new tokens_per_block as first argument in binding for preAllocBufferSize; updated argument order.
C++ bindings (pybind11)
cpp/tensorrt_llm/pybind/batch_manager/cacheTransceiver.cpp
Added tokens_per_block parameter first in the pybind11 binding for preAllocBufferSize; adjusted signature order.
Python wrapper
tensorrt_llm/_torch/pyexecutor/kv_cache_transceiver.py
Changed CacheTransBufferManager.pre_alloc_buffer_size signature to (tokens_per_block, kv_cache_size_per_token, cache_transceiver_config); forwarded new arg order to C++ binding.
Unit tests
cpp/tests/unit_tests/batch_manager/cacheTransBufferTest.cpp
Updated calls to preAllocBufferSize to include tokensPerBlock as first argument; assertions rely on new buffer size behavior.

Sequence Diagram(s)

sequenceDiagram
  autonumber
  actor Caller as Model/Executor
  participant CTBM as CacheTransBufferManager
  Caller->>CTBM: preAllocBufferSize(tokensPerBlock, cacheSizeMap, config)
  activate CTBM
  note right of CTBM: Compute alignedWindowSize = align(windowSize, tokensPerBlock)
  CTBM->>CTBM: validTokenNum = min(alignedWindowSize (+extra block if misaligned), maxNumTokens)
  CTBM-->>Caller: preAllocatedBytes
  deactivate CTBM
  Caller->>Caller: Configure transfer/alloc sizes
Loading
sequenceDiagram
  autonumber
  actor Py as Python Client
  participant PyWrap as Python CacheTransBufferManager
  participant PB as pybind/nanobind
  participant CTBM as C++ CacheTransBufferManager
  Py->>PyWrap: pre_alloc_buffer_size(tokens_per_block, kv_size, config)
  PyWrap->>PB: pre_alloc_buffer_size(tokens_per_block, map, config)
  PB->>CTBM: preAllocBufferSize(tokensPerBlock, map, config)
  CTBM-->>PB: bytes
  PB-->>PyWrap: bytes
  PyWrap-->>Py: bytes
Loading

Estimated code review effort

🎯 3 (Moderate) | ⏱️ ~25 minutes

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✅ Passed checks (1 passed)
Check name Status Explanation
Title Check ✅ Passed The title follows the required ticket and type format and concisely describes the main change of fixing the cache buffer sizing logic for window alignment, which reflects the core modifications made in this PR.
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Actionable comments posted: 4

🧹 Nitpick comments (1)
cpp/tensorrt_llm/batch_manager/cacheTransBuffer.h (1)

63-65: Add Doxygen comment for tokensPerBlock
In cacheTransBuffer.h above the preAllocBufferSize declaration, add a brief Doxygen description of the tokensPerBlock parameter and how it influences buffer alignment and headroom.

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📒 Files selected for processing (7)
  • cpp/tensorrt_llm/batch_manager/cacheTransBuffer.cpp (3 hunks)
  • cpp/tensorrt_llm/batch_manager/cacheTransBuffer.h (1 hunks)
  • cpp/tensorrt_llm/batch_manager/trtGptModelInflightBatching.cpp (1 hunks)
  • cpp/tensorrt_llm/nanobind/batch_manager/cacheTransceiver.cpp (1 hunks)
  • cpp/tensorrt_llm/pybind/batch_manager/cacheTransceiver.cpp (1 hunks)
  • cpp/tests/unit_tests/batch_manager/cacheTransBufferTest.cpp (2 hunks)
  • tensorrt_llm/_torch/pyexecutor/kv_cache_transceiver.py (1 hunks)
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🧠 Learnings (4)
📓 Common learnings
Learnt from: thorjohnsen
PR: NVIDIA/TensorRT-LLM#6910
File: cpp/tensorrt_llm/batch_manager/kvCacheManager.cpp:0-0
Timestamp: 2025-08-14T21:04:50.248Z
Learning: In KV cache onboarding logic during prefill in cpp/tensorrt_llm/batch_manager/kvCacheManager.cpp, when calculating which blocks fall within the attention window, use getTokensPerBlock() to advance token indices rather than block->getUniqueTokens().size(), because the calculation needs to consider the post-prefill state where blocks will be filled to capacity, not their current token count.
📚 Learning: 2025-08-14T21:04:50.248Z
Learnt from: thorjohnsen
PR: NVIDIA/TensorRT-LLM#6910
File: cpp/tensorrt_llm/batch_manager/kvCacheManager.cpp:0-0
Timestamp: 2025-08-14T21:04:50.248Z
Learning: In KV cache onboarding logic during prefill in cpp/tensorrt_llm/batch_manager/kvCacheManager.cpp, when calculating which blocks fall within the attention window, use getTokensPerBlock() to advance token indices rather than block->getUniqueTokens().size(), because the calculation needs to consider the post-prefill state where blocks will be filled to capacity, not their current token count.

Applied to files:

  • cpp/tensorrt_llm/batch_manager/cacheTransBuffer.h
  • cpp/tensorrt_llm/batch_manager/cacheTransBuffer.cpp
  • tensorrt_llm/_torch/pyexecutor/kv_cache_transceiver.py
  • cpp/tensorrt_llm/batch_manager/trtGptModelInflightBatching.cpp
  • cpp/tensorrt_llm/pybind/batch_manager/cacheTransceiver.cpp
  • cpp/tensorrt_llm/nanobind/batch_manager/cacheTransceiver.cpp
  • cpp/tests/unit_tests/batch_manager/cacheTransBufferTest.cpp
📚 Learning: 2025-08-15T06:46:54.897Z
Learnt from: eopXD
PR: NVIDIA/TensorRT-LLM#6767
File: cpp/tensorrt_llm/batch_manager/kvCacheManager.cpp:0-0
Timestamp: 2025-08-15T06:46:54.897Z
Learning: In cpp/tensorrt_llm/batch_manager/kvCacheManager.cpp addToken function, newly allocated blocks are unshared by design. The beam search path in addToken (when sequence.getNumTokens() > windowSize) is currently broken/non-functional with SWA, so the block allocation doesn't follow a shared-then-unshared pattern.

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  • cpp/tensorrt_llm/batch_manager/cacheTransBuffer.h
  • cpp/tensorrt_llm/batch_manager/cacheTransBuffer.cpp
  • cpp/tensorrt_llm/batch_manager/trtGptModelInflightBatching.cpp
  • cpp/tensorrt_llm/pybind/batch_manager/cacheTransceiver.cpp
  • cpp/tensorrt_llm/nanobind/batch_manager/cacheTransceiver.cpp
  • cpp/tests/unit_tests/batch_manager/cacheTransBufferTest.cpp
📚 Learning: 2025-08-20T06:56:02.889Z
Learnt from: eopXD
PR: NVIDIA/TensorRT-LLM#6768
File: cpp/tensorrt_llm/batch_manager/kvCacheManager.cpp:577-579
Timestamp: 2025-08-20T06:56:02.889Z
Learning: In cpp/tensorrt_llm/batch_manager/kvCacheManager.cpp, maxSequenceLength is now enforced as a non-optional argument in the BlockManager constructor, so concerns about std::nullopt defaulting to 0 are not applicable. When windowSize > maxSequenceLength, a warning should be added instead of handling optional parameter cases.

Applied to files:

  • cpp/tensorrt_llm/batch_manager/cacheTransBuffer.h
  • cpp/tensorrt_llm/batch_manager/cacheTransBuffer.cpp
  • cpp/tensorrt_llm/batch_manager/trtGptModelInflightBatching.cpp
🧬 Code graph analysis (4)
cpp/tensorrt_llm/batch_manager/cacheTransBuffer.h (1)
cpp/tensorrt_llm/batch_manager/cacheTransBuffer.cpp (2)
  • preAllocBufferSize (244-279)
  • preAllocBufferSize (244-246)
cpp/tensorrt_llm/batch_manager/cacheTransBuffer.cpp (1)
cpp/tests/unit_tests/multi_gpu/cacheTransceiverTest.cpp (1)
  • maxNumTokens (293-307)
tensorrt_llm/_torch/pyexecutor/kv_cache_transceiver.py (2)
tensorrt_llm/llmapi/llm_args.py (1)
  • CacheTransceiverConfig (1277-1294)
cpp/tensorrt_llm/executor/cacheTransceiverConfig.cpp (1)
  • CacheTransceiverConfig (24-29)
cpp/tests/unit_tests/batch_manager/cacheTransBufferTest.cpp (1)
cpp/tensorrt_llm/batch_manager/cacheTransBuffer.cpp (2)
  • preAllocBufferSize (244-279)
  • preAllocBufferSize (244-246)
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🔇 Additional comments (5)
cpp/tensorrt_llm/batch_manager/trtGptModelInflightBatching.cpp (1)

309-310: LGTM: tokensPerBlock forwarded correctly.

Call matches new API and uses mModelConfig.getTokensPerBlock().

cpp/tensorrt_llm/pybind/batch_manager/cacheTransceiver.cpp (1)

181-183: Binding arg order aligned with C++ API.

Exposes tokens_per_block first; consistent with header/impl.

cpp/tensorrt_llm/nanobind/batch_manager/cacheTransceiver.cpp (1)

185-187: Nanobind signature updated correctly.

tokens_per_block added as first arg; consistent across bindings.

cpp/tests/unit_tests/batch_manager/cacheTransBufferTest.cpp (2)

117-118: Tests updated for new API — OK.

Now passing tokensPerBlock first; assertions still valid.


159-160: Tests updated for new API — OK.

Consistent with header/impl change.

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PR_Github #21205 [ run ] triggered by Bot

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PR_Github #21205 [ run ] completed with state SUCCESS
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@chuangz0 chuangz0 force-pushed the fix_cache_trans_buffer_size branch from 7d6c795 to 34dc82b Compare October 14, 2025 01:18
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/bot run --only-multi-gpu-test

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@chuangz0 chuangz0 force-pushed the fix_cache_trans_buffer_size branch from 34dc82b to 857cca8 Compare October 14, 2025 06:14
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/bot run --only-multi-gpu-test

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@chuangz0 chuangz0 force-pushed the fix_cache_trans_buffer_size branch from 857cca8 to 682f6b2 Compare October 15, 2025 03:39
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/bot run --only-multi-gpu-test

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Signed-off-by: Chuang Zhu <[email protected]>
Signed-off-by: Chuang Zhu <[email protected]>
@chuangz0 chuangz0 force-pushed the fix_cache_trans_buffer_size branch from 91be41c to 93d1ac5 Compare October 15, 2025 06:55
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/bot run --only-multi-gpu-test

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PR_Github #21440 [ run ] completed with state SUCCESS
/LLM/main/L0_MergeRequest_PR pipeline #16191 (Partly Tested) completed with status: 'SUCCESS'
Pipeline passed with automatic retried tests. Check the rerun report for details.

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/bot run --disable-fail-fast

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PR_Github #21491 [ run ] triggered by Bot

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PR_Github #21491 [ run ] completed with state SUCCESS
/LLM/main/L0_MergeRequest_PR pipeline #16224 completed with status: 'SUCCESS'

@kaiyux kaiyux merged commit 40d129a into NVIDIA:main Oct 16, 2025
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govind-ramnarayan pushed a commit to nv-auto-deploy/TensorRT-LLM that referenced this pull request Oct 21, 2025
yufeiwu-nv pushed a commit to yufeiwu-nv/TensorRT-LLM that referenced this pull request Oct 24, 2025
dominicshanshan pushed a commit to dominicshanshan/TensorRT-LLM that referenced this pull request Nov 1, 2025
dominicshanshan pushed a commit to dominicshanshan/TensorRT-LLM that referenced this pull request Nov 3, 2025
dominicshanshan pushed a commit to dominicshanshan/TensorRT-LLM that referenced this pull request Nov 3, 2025
dominicshanshan pushed a commit to dominicshanshan/TensorRT-LLM that referenced this pull request Nov 3, 2025
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6 participants