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[https://nvbugs/5537738][fix] Add fp8 post-quant allgather support #8008
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📝 WalkthroughWalkthroughRefactors fused MoE generation flow to simplify post-quant allgather gating, add explicit branches for DeepSeek FP8 and W4A16 MXFP4 (including conditional padding), adjust router/quantization inputs when allgather is enabled, and pass top-k routing data to FP8-related MoE runners. Removes a corresponding test waive entry. Changes
Sequence Diagram(s)sequenceDiagram
autonumber
participant C as Caller
participant F as FusedMoE (gen)
participant R as Router/Quant
participant M as MoE Runner
C->>F: forward(x, config, use_dp, parallel_size, ...)
Note over F: Compute run_post_quant_allgather = use_dp && parallel_size>1
alt has_w4a16_mxfp4
F->>F: Compute pad_size from w3_w1_weight & x.shape[-1]
alt pad needed AND NOT run_post_quant_allgather
F->>F: Pad x (and related tensors)
else No pad or allgather active
Note over F: Preserve input width
end
else has_deepseek_fp8_block_scales
Note over F: No-op branch for block scales
end
F->>R: Prepare routing/quantization
alt run_post_quant_allgather == true
Note over R: Post-quant allgather path
F->>M: router_logits=None, routing_bias=None, topk_ids, topk_weights
else run_post_quant_allgather == false
F->>M: router_logits, routing_bias, topk_ids, topk_weights
end
alt FP8 (DeepSeek) or BF16 MXE2M1 path
Note over M: Pass topk_ids/topk_weights to runner
else Other modes
Note over M: Standard execution
end
M-->>C: outputs
Estimated code review effort🎯 3 (Moderate) | ⏱️ ~20 minutes Pre-merge checks and finishing touches❌ Failed checks (1 warning)
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Actionable comments posted: 0
Caution
Some comments are outside the diff and can’t be posted inline due to platform limitations.
⚠️ Outside diff range comments (1)
tensorrt_llm/_torch/modules/fused_moe/fused_moe_trtllm_gen.py (1)
269-289: Pass float32 top‑k weights into DeepSeek FP8 runner
fp8_block_scale_moe_runnerstill reinterprets its top‑k weights buffer asfloat*. We now passtoken_final_scales.to(torch.bfloat16)whenrun_post_quant_allgatheris true, so the kernel consumes BF16 data via a float pointer, yielding corrupted gating probabilities and wrong expert activation. Keeptoken_final_scalesinfloat32for this path (and do so before the allgather to avoid mixed dtypes).Apply:
- token_selected_experts, token_final_scales = self.routing_method.apply( - router_logits) - token_final_scales = token_final_scales.to(torch.bfloat16) + token_selected_experts, token_final_scales = self.routing_method.apply( + router_logits) + if not self.has_deepseek_fp8_block_scales: + token_final_scales = token_final_scales.to(torch.bfloat16)This keeps the DeepSeek FP8 path in float32 while preserving the BF16 downcast for other modes that require it. Based on learnings.
🧹 Nitpick comments (1)
tensorrt_llm/_torch/modules/fused_moe/fused_moe_trtllm_gen.py (1)
341-345: Remove redundant no‑op assignment
x = xinside theelseadds noise without value. Please drop it.Apply:
- else: - x = x
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📒 Files selected for processing (2)
tensorrt_llm/_torch/modules/fused_moe/fused_moe_trtllm_gen.py(6 hunks)tests/integration/test_lists/waives.txt(0 hunks)
💤 Files with no reviewable changes (1)
- tests/integration/test_lists/waives.txt
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tensorrt_llm/_torch/modules/fused_moe/fused_moe_trtllm_gen.py
🧠 Learnings (4)
📓 Common learnings
Learnt from: jhaotingc
PR: NVIDIA/TensorRT-LLM#7856
File: cpp/tensorrt_llm/thop/fp8BlockScaleMoe.cpp:159-166
Timestamp: 2025-09-19T21:28:13.751Z
Learning: In TensorRT-LLM blockScaleMoe routing (cpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/runner.cu), the DeepSeek routing method performs reinterpret_cast<float*>(routingLogits) at line 89, which could cause issues if routing_logits are BF16. However, Qwen3-FP8 models use RenormalizeNaive routing method and are not affected by this dtype casting issue.
Learnt from: sklevtsov-nvidia
PR: NVIDIA/TensorRT-LLM#3294
File: cpp/tensorrt_llm/kernels/cutlass_kernels/moe_gemm/moe_kernels.cu:1198-1209
Timestamp: 2025-08-08T22:03:40.707Z
Learning: In the CUTLASS MoE kernels (cpp/tensorrt_llm/cutlass_extensions), when `layout_info.fusion` is set to `TmaWarpSpecializedGroupedGemmInput::EpilogueFusion::FINALIZE`, the `router_scales` parameter must be non-null by design. The fused finalize kernel epilogue does not perform nullptr checks and requires valid router scales to function correctly. This is an implicit contract that callers must satisfy when enabling the FINALIZE fusion mode.
📚 Learning: 2025-09-19T21:28:13.751Z
Learnt from: jhaotingc
PR: NVIDIA/TensorRT-LLM#7856
File: cpp/tensorrt_llm/thop/fp8BlockScaleMoe.cpp:159-166
Timestamp: 2025-09-19T21:28:13.751Z
Learning: In TensorRT-LLM blockScaleMoe routing (cpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/runner.cu), the DeepSeek routing method performs reinterpret_cast<float*>(routingLogits) at line 89, which could cause issues if routing_logits are BF16. However, Qwen3-FP8 models use RenormalizeNaive routing method and are not affected by this dtype casting issue.
Applied to files:
tensorrt_llm/_torch/modules/fused_moe/fused_moe_trtllm_gen.py
📚 Learning: 2025-08-14T23:23:27.449Z
Learnt from: djns99
PR: NVIDIA/TensorRT-LLM#6915
File: cpp/tensorrt_llm/kernels/cutlass_kernels/moe_gemm/moe_kernels.cu:4010-4012
Timestamp: 2025-08-14T23:23:27.449Z
Learning: For MOE (Mixture of Experts) code reviews in TensorRT-LLM, avoid repeatedly suggesting finalize fusion validation checks and safety assertions. The user djns99 has indicated these suggestions are repetitive and unwanted across multiple MOE-related changes.
Applied to files:
tensorrt_llm/_torch/modules/fused_moe/fused_moe_trtllm_gen.py
📚 Learning: 2025-08-08T22:03:40.707Z
Learnt from: sklevtsov-nvidia
PR: NVIDIA/TensorRT-LLM#3294
File: cpp/tensorrt_llm/kernels/cutlass_kernels/moe_gemm/moe_kernels.cu:1198-1209
Timestamp: 2025-08-08T22:03:40.707Z
Learning: In the CUTLASS MoE kernels (cpp/tensorrt_llm/cutlass_extensions), when `layout_info.fusion` is set to `TmaWarpSpecializedGroupedGemmInput::EpilogueFusion::FINALIZE`, the `router_scales` parameter must be non-null by design. The fused finalize kernel epilogue does not perform nullptr checks and requires valid router scales to function correctly. This is an implicit contract that callers must satisfy when enabling the FINALIZE fusion mode.
Applied to files:
tensorrt_llm/_torch/modules/fused_moe/fused_moe_trtllm_gen.py
🧬 Code graph analysis (1)
tensorrt_llm/_torch/modules/fused_moe/fused_moe_trtllm_gen.py (2)
tensorrt_llm/_torch/modules/fused_moe/interface.py (2)
has_deepseek_fp8_block_scales(290-293)has_w4a16_mxfp4(314-317)tensorrt_llm/_torch/custom_ops/trtllm_gen_custom_ops.py (1)
bf16_mxe2m1_block_scale_moe_runner(1355-1434)
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Signed-off-by: Christina Zhang <83400082+ChristinaZ@users.noreply.github.com>
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Summary by CodeRabbit
Bug Fixes
Improvements
Tests
Description
Fix the bug related to the fp8 post quant allgather for MoE TRTLLM backend
Test Coverage
pytest -s -o log_cli=true "tests/integration/defs/accuracy/test_llm_api_pytorch.py::TestDeepSeekR1::test_fp8_blockscale[throughput_mtp_trtllm]"
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