[https://nvbugs/6627795][fix] stop charging retiring requests against ADP admission and capacity

[chenfeiz0326]

Description

The bug

Under the overlap scheduler a request that has finished generating is not torn down until
the next iteration (GENERATION_TO_COMPLETE). Those retiring requests were charged
against attention-DP admission and capacity even though the capacity scheduler had already
dropped them from its budget — so a rank held admission open for requests that could not be
scheduled, and offered load could not fill the window. That is nvbug 6627795.

Fixing the charge alone does not fix the bug, and that is the more important half of this PR.
The number of simultaneously-live sequences was re-derived from max_batch_size at six
sites with four different formulas, so widening one pool left the others behind. Widening
the seat pool to 2B for aggregated ADP+overlap left KVCacheManagerV2's index pool at
B+1; the recovered admission was then handed straight back — _create_kv_cache logs
No free IndexMapper slots, returns None, and the scheduler silently defers the request
(3412 times in the reproducer). The defect class is the re-derivation, not any particular
capacity number.

What changes

1. Stop charging retiring requests against ADP admission
(scheduler/adp_router.py, py_executor.py)
The router excludes GENERATION_TO_COMPLETE requests from the per-rank loads it balances on.
Two consequences are handled here rather than left to be discovered:

• The idle check must still count them. They are unschedulable but still resident, so
  _fetch_and_enqueue_requests now takes total_num_live_requests (active + retiring).
  Getting this wrong is a deadlock, not a slowdown: it selects a blocking versus a zero
  timeout, and a rank that blocks on the untimed queue wait while its peers reach
  dist.broadcast(root=0) hangs the iteration.
• The ADP dummy path compares against the same routable count the router used, reading
  the router's own flag instead of re-deriving the predicate — otherwise its warning fires
  every iteration.

count_retiring_requests is factored out so the router and the executor cannot disagree, and
ADPRouter.create() now requires has_seq_slot_headroom from the engine. A default would
be the same re-derivation this PR removes.

2. One seat coefficient, plumbed into every consumer instead of re-derived
(_util.py, model_engine.py, kv_cache/kv_cache_manager_v2.py, py_executor_creator.py,
speculative/{eagle3,mtp,mtp_dynamic_tree,spec_tree_manager,suffix_automaton,utils}.py)
compute_max_num_sequences becomes the single definition, and the seat count is delivered
to each pool that indexes by py_seq_slot: the V2 index pool (target, draft and cross
managers), the guided decoder, the drafter's own SeqSlotManager, and the spec-decode
identity pools. create_torch_sampler_args now requires max_num_sequences and no
longer accepts mapping/max_batch_size, so the old fallback that silently recomputed the
number without the headroom gate cannot come back. is_disagg_enabled() replaces four
inlined copies of the backend is not None test.

The coefficient is additive in pp_size, not multiplicative — pipeline depth already
pays for the pp_size micro-batches structurally in flight, and the overlap deferral is one
iteration on top of them, so the bound is (pp_size + 1) · B. At pp_size == 1 that
coincides with the historical 2B, which is why today's code can express it as a factor of
2. Five of the six cells of the coefficient table are byte-identical to today; the sixth
(PP + ADP + overlap) is unreachable because the gate stays closed — see below.

3. A two-sided startup validator (_util.py)
validate_seq_slot_pool_covers_admission raises a ValueError naming both numbers if the
seat pool and a manager's max_admissible_sequences disagree in either direction.
One-sided is what let this bug through: seats >= pool was satisfied the whole time while
the pool was the binding constraint. The opposite skew — pool larger than seats — is
#18742, where add_slot raises on the
executor's event-loop thread and kills the rank mid-collective. Managers that do not publish
the attribute (V1, hybrid) are skipped rather than compared against a number they never
consumed.

4. Comments where the sizing is deliberately not uniform
(kv_cache/mamba_cache_manager.py, +21 lines, no behaviour change)
cuda_state_indices is keyed by scheduled-batch position, so it must stay max_batch_size
and must not grow with pp_size or the seat pool; the SSM slot floor next to it is a
per-live-sequence lease, so it tracks B · pp. Recording which is which is what stops the
next reader from "fixing" the consistent one.

Deliberately out of scope, and gated off on purpose

• Pipeline parallelism. Implemented, measured on GB300, and reverted (4030e8e1be,
  f498e0f49b) — see Test coverage §4. The sizing expresses PP correctly, but the seats
  are unspendable there, so the gate keeps not mapping.has_pp(). The reverts are kept in
  history rather than rebased away so the measurement stays anchored to the code it was
  measured on, and the numbers are now in the gate's docstring.
• Hybrid/SSM architectures are excluded from the headroom: MambaHybridCacheManagerV2
  sizes state_index_capacity from max_batch_size alone, so an extra seat would have no
  state slot behind it. Pre-existing gap, left to its own PR.
• should_enable_adp_dummy_fixes stays non-PP. Independent concern; widening both gates
  at once would conflate them.
• V1 KVCacheManager receives none of this plumbing and still re-derives from bare
  max_batch_size. Deliberate — V1 is being deprecated, which is why the index-pool fix went
  to V2.
• An earlier revision also narrowed the V1 capacity scheduler by one state (plus the LoRA
  pre-claim that kept it safe). 9ef2f5eab5 reverts all of it; four files are byte-identical
  to main.
• py_executor.py's batch_size_input = len(self.active_requests) has the same staleness
  but needs spec-dec plus an explicit draft_len_schedule, so it is left alone.

Why this is one PR

Sites 1–4 are the mechanism that makes the fix real: shipping the coefficient alone allocates
seats nothing consumes, and shipping the admission change alone hands the recovered
admission back at the index pool. Happy to split if a reviewer prefers, with the caveat that
the intermediate states are each individually pointless.

Coordination with #18742: that PR merged today (2026-09-07) into feat/m3_with_msa, not
main, so the two meet when that branch merges up rather than here. The coefficients already
agree on every cell reachable there — its headroom gate keeps the not has_pp() precondition,
which makes the one differing cell above unreachable, and both disagg rows are identical since
max(B·pp, 2·B·pp) == 2·B·pp. So that conflict is textual.

The part that is not textual: on feat/m3_with_msa, max_admissible_sequences is still
re-derived inside the manager (max_num_seq_slots appears zero times in the file), and the
validator there is one-sided (seats >= admissible). That pair is self-consistent on that
branch, because its gate never grants headroom outside disagg. It stops being self-consistent
against this PR, which grants 2B to aggregated ADP+overlap — a re-deriving manager would
still offer B, and a one-sided guard passes exactly that skew silently. Hence the two things
this PR keeps: the manager consumes the seat count, and the validator is two-sided. The
second is compatible rather than a trade — under disagg both sides land on 2·B·pp, so the
configuration #18742 fixes passes an equality check unchanged. Details and the collision table
are in #18742 (comment); its
disagg integration config and waives.txt deletion have no counterpart here and should survive
the merge as-is.

Test Coverage

1. Unit tests — and a CPU-only negative-control ladder

New: tests/unittest/_torch/speculative/test_spec_slot_pool_sizing.py (19 tests) — every
spec-dec pool is sized from the seat pool, the num_seq_slots or max_num_requests fallback
is preserved for callers that do not know it, and the builder signatures cannot silently drop
the parameter.

Updated: test_seq_slot_sizing.py (15 tests — the coefficient table, is_disagg_enabled,
the resolver, the two-sided validator), test_adp_router.py (retiring-request filtering,
has_seq_slot_headroom as a required parameter), kv_cache/test_kv_cache_manager_v2.py (the
index pool consumes the seat count and publishes max_admissible_sequences),
test_kvcache_aware_router.py, test_py_executor.py, test_benchmark_disagg.py,
test_kv_cache_estimation.py, test_qwen4_exp_support.py.

Why a ladder and not just "the new tests pass": CI only ever runs the patched tree, so it
cannot distinguish "the fix works" from "the tests do not bind to the change". Every new
test is declared in advance as must-fail-on-baseline or must-pass-on-both, and the run
asserts the declared table against the actual one. Run on a CPU-only Slurm node — no GPU, no
build; the container's own wheel plus whole-file swaps of the five test files and eight
sources, with per-file cmp byte-identity asserted so a silent cp failure cannot make the
two arms the same run. Slurm job 1890512.

	baseline sources	fixed sources
kv_cache/test_kv_cache_manager_v2.py	48 collected	48
test_seq_slot_sizing.py	0 — collection error	47
test_adp_router.py	94	94
test_pp_retiring_rank_consistency.py¹	9	9
test_spec_slot_pool_sizing.py	29	29
total	180	227
result	21 failed, 143 passed, 17 skipped, rc=1	0 failed, 210 passed, 17 skipped, rc=0

¹ Removed together with the PP commits it covered; the ladder below is the run as it was
executed, at the head that still contained them.

210 passed + 17 skipped == 227 collected, so the green arm is green over every id it
collected rather than over a silently deselected subset (the 17 skips are
skipif(not cuda) pool tests in test_spec_slot_pool_sizing.py). The four files that
collect on both arms collect the same number of ids on both, so no baseline "pass" is an
id that quietly vanished.

The 21 baseline failures are declared in advance, as (name, exact count) rows, and the
declared set must account for the whole failure set — an undeclared extra failure fails
the run:

baseline failure	n	binds to
test_index_mapper_capacity_covers_seq_slot_pool	4	the index pool now consumes the seat count (incl. the new pp4_adp_overlap cell)
test_index_mapper_publishes_max_admissible_sequences	3	the attribute the two-sided validator reads
test_seq_slot_sizing.py	1	imports is_disagg_enabled / resolve_max_num_sequences / validate_seq_slot_pool_covers_admission, none of which exist on baseline — so it raises at collection and pytest reports one ERROR with no node ids
TestDefaultADPRouter headroom/factory tests	5	has_seq_slot_headroom is handed to the router instead of re-derived
TestConversationAwareADPRouter factory tests	3	same, via the required parameter on ADPRouter.create
test_pp_retiring_rank_consistency.py structural tests	2	baseline's _forward_step_inter_pp does not mark retiring requests
test_spec_slot_pool_sizing.py drafter-pool tests	3	the drafter's own SeqSlotManager sized from max_batch_size

Stated plainly: two of those groups (the collection error, and the four
has_seq_slot_headroom signature failures) fail on baseline for a signature reason rather
than a behavioural one. They show the tests bind to the change; they are not evidence about
admission. The behavioural evidence is the first two rows plus the last three.

The second table is the one that is easy to omit and is the reason the run is a ladder rather
than a one-sided "the new tests fail on baseline" check: 14 declared invariant ids that must
pass on both arms, among 142 baseline passes. They include the six
test_index_mapper_capacity_covers_seq_slot_pool cells the PR claims not to move (the same
file therefore appears in both tables), [False-8] of the drafter-pool test, and the six
arithmetic ids in test_pp_retiring_rank_consistency.py that exercise the pre-existing
willCompleteNextIteration predicate — the anti-vacuity evidence that the predicate itself is
not what changed.

LADDER_VERDICT=PASS.

2. GPU A/B — the index-pool skew, on discrete evidence

Aggregated ctx_only GLM-5 NVFP4 on GB300, use_kv_cache_manager_v2: true, ADP on, overlap
on, unpatched vs patched. Gate 0 required the KVCacheManagerV2: IndexMapper capacity=
banner, or the arm ran V1 and is void. The mechanism is discrete, so this is the claim:

	unpatched	patched
No free IndexMapper slots deferrals	3412	0
mean scheduled batch	1.5	2.0

I am not claiming the accompanying +0.87% throughput. The paired noise floor on that
case — measured from two arms whose discrete metrics were provably identical — was 0.37%,
which is too close to lean on. The evidence here is the deferral count and the batch
packing, neither of which is a wall-clock measurement.

Note the exhaustion warning that surfaced this prints its %d/%d uninterpolated and
attributes the shortfall to disaggregation even on an aggregated run with no transceiver
configured. Not fixed here; worth a one-liner.

3. GPU A/B — efficacy, all 15 GB300 ctx_only perf-sanity cases

Every ctx_only case in l0_gb300_multi_gpus_perf_sanity.yml, both arms, one rep each.
BASE = main tot c1d013411c; FIX = BASE + this PR. Metric total_token_throughput. A case
can only respond to this patch if all three hold — overlap ON, a real admission queue
(con > cap), and a forward batch not already capped by tokens
(max_num_tokens >= max_batch_size × ISL); classification is computed from the config
before the numbers arrive.

case	overlap	con	cap	class	BASE	FIX (this PR)	delta
deepseek-r1-fp4_128k8k_con256_ctx1_pp4_gen1_dep8_eplb0_mtp1	ON	256	1	movable	27762.61	27554.53	-0.75%
deepseek-r1-fp4_8k1k_con4096_ctx1_dep4_gen1_dep16_eplb0_mtp1	ON	4096	8	movable	85057.35	93663.28	+10.12%
deepseek-v4-pro-fp4_8k1k_con180_ctx3_dep4_gen1_dep32_eplb384_mtp3	ON	180	8	inert (token-limited)	65053.46	64627.17	-0.66%
deepseek-v4-pro-fp4_8k1k_con4301_ctx12_dep4_gen1_dep8_eplb384_mtp1	ON	4301	8	inert (token-limited)	64879.38	64896.80	+0.03%
deepseek-v4-pro-fp4_8k1k_con666_ctx6_dep4_gen1_dep16_eplb384_mtp3	ON	666	8	inert (token-limited)	64922.10	65544.54	+0.96%
deepseek-v4-pro-fp4_8k1k_con8_ctx1_dep4_gen4_tep8_eplb0_mtp3	ON	8	8	inert (con ≤ cap)	n/a	n/a	did not run
glm-5-fp4_8k1k_con1024_ctx1_dep2_gen1_dep8_eplb256_mtp1	ON	1024	4	movable	27146.26	34214.86	+26.04%
glm-5-fp4_8k1k_con1_ctx1_dep2_gen1_tep8_eplb0_mtp3	ON	1	4	inert (con ≤ cap)	9169.12	14950.31	+63.05% (noise)
glm-5-fp4_8k1k_con512_ctx1_dep2_gen1_dep32_eplb0_mtp3	ON	512	4	movable	26826.68	34359.28	+28.08%
nemotron-ultra-v3-fp4_50k2k_con1197_ctx16_dep4_gen1_dep8_eplb0_mtp3	off	1197	32	guard (overlap off)	76406.16	76717.94	+0.41%
nemotron-ultra-v3-fp4_50k2k_con12_ctx1_dep4_gen6_tep4_eplb0_mtp6	off	12	32	guard (overlap off)	75180.70	74435.69	-0.99%
nemotron-ultra-v3-fp4_50k2k_con178_ctx5_dep4_gen1_dep4_eplb0_mtp6	off	178	32	guard (overlap off)	76410.79	76208.81	-0.26%
nemotron-ultra-v3-fp4_8k64k_con1_ctx1_dep4_gen1_tep4_eplb0_mtp5	off	1	32	guard (overlap off)	15782.41	15898.21	+0.73% (noise)
nemotron-ultra-v3-fp4_8k64k_con64_ctx1_dep4_gen1_tep8_eplb0_mtp3	off	64	32	guard (overlap off)	72165.64	71424.52	-1.03% (noise)
nemotron-ultra-v3-fp4_8k64k_con9832_ctx1_dep4_gen8_dep8_eplb0_mtp3	off	9832	32	guard (overlap off)	81824.16	82515.74	+0.85%

The 4 movable rows are the only ones carrying efficacy evidence: glm-5 con512
+28.08%, glm-5 con1024 +26.04%, deepseek-r1 con4096 +10.12%, deepseek-r1
128k8k −0.75%. 3 of 4 gained beyond the ~3% noise floor, 1 flat, 0 regressed. No
average is taken — cap, ISL and parallelism differ, so a mean would not refer to anything.

The flat movable row is kept in the denominator, not reclassified: it has cap = 1, and a
batch holding one request by construction cannot be enlarged, leaving only stall-avoidance
worth one admission opportunity per request — unresolvable amortised across a 128k prefill.
That was written from the config before the number arrived, but a pre-registered reason
justifies explaining a result, not removing it.

What the pattern rules out. Ranked by how far offered load exceeds capacity: 22× →
−0.66%, 83× → +0.96%, 128× → +28.08%, 256× → +26.04%, 512× → +10.12%,
538× → +0.03%. The deepest queue in the sweep is the flattest row of all, so "this just
speeds up deeply-queued cases" is excluded by data. The discriminator is token headroom
first, then cap size — which is what the root cause requires.

Rows that are not evidence, in either direction:

• 3 inert (token-limited) — the dsv4 cases set max_num_tokens: 8192 with
  max_batch_size 2 at ISL ~7.4k, so one request fills the token budget and the batch is
  capped at one by tokens, not admission. Inert by construction. I predicted gains here
  before computing the token budget and was wrong; the corrected predicate then called
  con666 and con4301 flat in advance, and both held.
• 4 measurable guard rows (overlap already off) — −0.99%, −0.26%, +0.41%, +0.85%.
  These straddle zero (mean ≈ +0.003%), which corroborates the no-op but does not prove it;
  the proof is the zero-state-14 record count above, since one rep per arm cannot resolve
  sub-1%.
• 3 rows below the measurement floor, marked (noise) — glm-5 con1 (10 requests /
  8.94 s), nemotron con1 (8 / 4.15 s), nemotron con64 (128 / 14.53 s). Both arms completed
  every request with identical total_input_tokens, so the work matched and the window is
  simply too short for wall clock to resolve scheduling. The +63.05% on glm-5 con1 is ten
  sequential prefills under 9 s and a structurally inert case (con 1 ≤ cap 4) where the
  changed code cannot execute — reading it as a win would be wrong, and I am not counting
  it. The <15 s cut-off was pre-registered; the <100 request companion is post-hoc.
• 1 case never ran — deepseek-v4-pro 8k1k con8, host-RAM OOM during weight load on all
  4 attempts (2 per arm): step .0 OUT_OF_MEMORY 0:125, MaxRSS 262G/236G of a 900G grant.
  Not arm- or config-specific: AllocTRES is identical to the passing con4301 sibling
  and the ctx configs are the same shape, with con4301 additionally carrying an EPLB load
  balancer (more weight footprint, not less). No efficacy evidence is lost — it is inert
  on two counts (con 8 == cap 8, and token-limited), and its 80-request window would have
  fallen below the floor anyway.

Caveats on the whole table. One rep per arm, and BASE/FIX ran as separate allocations,
so generally different nodes at different times; same-node variance on this fleet has
previously faked a ~5% gap that collapsed to 2.4% once pinned. Treat sub-3% moves as noise.
Two arms (both of con4301) finished TIMEOUT with valid exports — the inclusion gate is
request accounting, not exit status, since the export is written before teardown.
Both arms run one wheel built at BASE (the patch is pure Python); each run echoes
PR18457 overlay OK arm=<ARM> and 30/30 arms carried a correct marker, because a
silently-unpatched FIX arm reads exactly like a clean null. Not exercised by this set:
plain-TP + no-PP + overlap-ON, the quadrant where the ungated capacity change meets a gated
headroom path. No Qwen-3.5 coverage is possible — it exists only as an aggregated/ config
with supported_gpus: [B200] and no disaggregated/ counterpart to derive ctx_only from.

Per-case run logs, job IDs and nodes (30 arms)

Run logs are on aws-cmh under $RIG = /lustre/fsw/portfolios/coreai/projects/coreai_tensorrt_ci/users/chenfeiz/agent/rigs/20260831-gb300-ctxonly.

case	arm	tok/s	requests	duration	job	node	run log ($RIG/…)
deepseek-r1_128k8k_con256_ctx1_pp4_gen1_dep8_eplb0_mtp1	BASE	27762.61	768/768	3625.89s	3477354	nvl72d102-T17	outputs/BASE-b1598e/slurm-3477354.out
deepseek-r1_128k8k_con256_ctx1_pp4_gen1_dep8_eplb0_mtp1	FIX	27554.53	768/768	3653.27s	3477352	nvl72d191-T18	outputs/FIX-b1598e/slurm-3477352.out
deepseek-r1_8k1k_con4096_ctx1_dep4_gen1_dep16_eplb0_mtp1	BASE	85057.35	20480/20480	1972.7s	3477360	nvl72d063-T17	outputs/BASE-f2b3d8/slurm-3477360.out
deepseek-r1_8k1k_con4096_ctx1_dep4_gen1_dep16_eplb0_mtp1	FIX	93663.28	20480/20480	1791.45s	3477358	nvl72d211-T14	outputs/FIX-f2b3d8/slurm-3477358.out
deepseek-v4-pro_8k1k_con180_ctx3_dep4_gen1_dep32_eplb384_mtp3	BASE	65053.46	1800/1800	205s	3477594	nvl72d105-T18	outputs/BASE-6ac34b/slurm-3477594.out
deepseek-v4-pro_8k1k_con180_ctx3_dep4_gen1_dep32_eplb384_mtp3	FIX	64627.17	1800/1800	206.36s	3477369	nvl72d161-T16	outputs/FIX-6ac34b/slurm-3477369.out
deepseek-v4-pro_8k1k_con4301_ctx12_dep4_gen1_dep8_eplb384_mtp1	BASE (TIMEOUT)	64879.38	43010/43010	4900.99s	3477363	nvl72d045-T18	outputs/BASE-4225e3/slurm-3477363.out
deepseek-v4-pro_8k1k_con4301_ctx12_dep4_gen1_dep8_eplb384_mtp1	FIX (TIMEOUT)	64896.80	43010/43010	4899.67s	3477362	nvl72d184-T15	outputs/FIX-4225e3/slurm-3477362.out
deepseek-v4-pro_8k1k_con666_ctx6_dep4_gen1_dep16_eplb384_mtp3	BASE	64922.10	6660/6660	757.79s	3477901	nvl72d173-T14	outputs/BASE-143b4d/slurm-3477901.out
deepseek-v4-pro_8k1k_con666_ctx6_dep4_gen1_dep16_eplb384_mtp3	FIX	65544.54	6660/6660	750.6s	3477864	nvl72d107-T18	outputs/FIX-143b4d/slurm-3477864.out
deepseek-v4-pro_8k1k_con8_ctx1_dep4_gen4_tep8_eplb0_mtp3	—	did not run	—	—	—	—	see note below
glm-5_8k1k_con1024_ctx1_dep2_gen1_dep8_eplb256_mtp1	BASE	27146.26	10240/10240	3090.53s	3477351	nvl72d078-T09	outputs/BASE-f7d2bf/slurm-3477351.out
glm-5_8k1k_con1024_ctx1_dep2_gen1_dep8_eplb256_mtp1	FIX	34214.86	10240/10240	2452.04s	3477347	nvl72d143-T09	outputs/FIX-f7d2bf/slurm-3477347.out
glm-5_8k1k_con1_ctx1_dep2_gen1_tep8_eplb0_mtp3	BASE	9169.12	10/10	8.94s	3477789	nvl72d113-T18	outputs/BASE-55b870/slurm-3477789.out
glm-5_8k1k_con1_ctx1_dep2_gen1_tep8_eplb0_mtp3	FIX	14950.31	10/10	5.48s	3477628	nvl72d015-T02	outputs/FIX-55b870/slurm-3477628.out
glm-5_8k1k_con512_ctx1_dep2_gen1_dep32_eplb0_mtp3	BASE	26826.68	5120/5120	1563.67s	3477366	nvl72d226-T15	outputs/BASE-045205/slurm-3477366.out
glm-5_8k1k_con512_ctx1_dep2_gen1_dep32_eplb0_mtp3	FIX	34359.28	5120/5120	1220.87s	3477364	nvl72d035-T16	outputs/FIX-045205/slurm-3477364.out
nemotron-ultra-v3_50k2k_con1197_ctx16_dep4_gen1_dep8_eplb0_mtp3	BASE	76406.16	1197/1197	783.33s	3478216	nvl72d173-T14	outputs/BASE-3fffa8/slurm-3478216.out
nemotron-ultra-v3_50k2k_con1197_ctx16_dep4_gen1_dep8_eplb0_mtp3	FIX	76717.94	1197/1197	780.15s	3478192	nvl72d089-T12	outputs/FIX-3fffa8/slurm-3478192.out
nemotron-ultra-v3_50k2k_con12_ctx1_dep4_gen6_tep4_eplb0_mtp6	BASE	75180.70	144/144	95.77s	3478172	nvl72d177-T14	outputs/BASE-6cf7b5/slurm-3478172.out
nemotron-ultra-v3_50k2k_con12_ctx1_dep4_gen6_tep4_eplb0_mtp6	FIX	74435.69	144/144	96.73s	3478112	nvl72d040-T17	outputs/FIX-6cf7b5/slurm-3478112.out
nemotron-ultra-v3_50k2k_con178_ctx5_dep4_gen1_dep4_eplb0_mtp6	BASE	76410.79	2848/2848	1863.65s	3477627	nvl72d015-T01	outputs/BASE-635a64/slurm-3477627.out
nemotron-ultra-v3_50k2k_con178_ctx5_dep4_gen1_dep4_eplb0_mtp6	FIX	76208.81	2848/2848	1868.59s	3477604	nvl72d019-T02	outputs/FIX-635a64/slurm-3477604.out
nemotron-ultra-v3_8k64k_con1_ctx1_dep4_gen1_tep4_eplb0_mtp5	BASE	15782.41	8/8	4.15s	3477975	nvl72d195-T08	outputs/BASE-258327/slurm-3477975.out
nemotron-ultra-v3_8k64k_con1_ctx1_dep4_gen1_tep4_eplb0_mtp5	FIX	15898.21	8/8	4.12s	3477961	nvl72d161-T09	outputs/FIX-258327/slurm-3477961.out
nemotron-ultra-v3_8k64k_con64_ctx1_dep4_gen1_tep8_eplb0_mtp3	BASE	72165.64	128/128	14.53s	3477361	nvl72d213-T16	outputs/BASE-1b8942/slurm-3477361.out
nemotron-ultra-v3_8k64k_con64_ctx1_dep4_gen1_tep8_eplb0_mtp3	FIX	71424.52	128/128	14.68s	3477359	nvl72d218-T17	outputs/FIX-1b8942/slurm-3477359.out
nemotron-ultra-v3_8k64k_con9832_ctx1_dep4_gen8_dep8_eplb0_mtp3	BASE	81824.16	19664/19664	1968.94s	3478005	nvl72d074-T18	outputs/BASE-4c0953/slurm-3478005.out
nemotron-ultra-v3_8k64k_con9832_ctx1_dep4_gen8_dep8_eplb0_mtp3	FIX	82515.74	19664/19664	1952.44s	3477999	nvl72d040-T15	outputs/FIX-4c0953/slurm-3477999.out

4. GPU A/B — pipeline parallelism: the run that removed the PP cell

The ctx_only cases above cannot test PP (requests retire on the context path, which every
rank already marks), so this needed a purpose-built generation-bearing case: aggregated GLM-5
NVFP4 on 4-way GB300, tp=2 pp=2 ep=2, ADP on, overlap on, max_batch_size=4,
max_num_tokens=8192, ISL 1024 / OSL 8, concurrency 32 × 60 iterations. Both arms
COMPLETED 0:0, 1920/1920 requests each, ~13.5 min.

Arm identity proven two independent ways, so a null cannot be vacuous:

	index-pool banner	executor banner
unpatched	IndexMapper capacity=9 (max_num_sequences=8, num_reserved_index_slots=1)	max_num_requests=8
patched	IndexMapper capacity=13 (max_num_sequences=8, max_num_seq_slots=12, ...)	max_num_requests=12

The scheduling is then identical, not merely similar — 1925 iteration records parsed per
arm, 0 unparsed:

metric	unpatched	patched
steady mean num_scheduled_requests (cap 4)	3.997	3.997
histogram (steady)	{0: 1, 3: 1, 4: 1731}	{0: 1, 3: 1, 4: 1731}
num_ctx_requests histogram	{0: 1409, 1: 108, 3: 108, 4: 108}	{0: 1409, 1: 108, 3: 108, 4: 108}
No free IndexMapper slots	0	0
V2-path control (excluding the mechanism's own message)	72	72

The pre-registered gate was "the patched arm must show a higher mean scheduled batch size",
with the kill criterion "if the unpatched arm shows no admission shortfall, the PP cell is
unmotivated". Both arms sit at 3.997 of 4, so: killed.

Why it cannot bind, which is the part worth keeping. Admission is capped independently at
pp_size * max_batch_size = 8 by get_max_num_sequences(), and the unpatched index pool is
pp_size * max_batch_size + 1 = 9. The unpatched arm therefore has slack and never
throttles — the per-micro-batch batch size, not the seat pool, is the limiter. That is
structurally unlike pp_size = 1, where retiring requests accumulate to ~B so demand
reaches 2B against a pool of B+1 (the 3412 deferrals in §2). pp_size multiplies both
sides of the seat inequality, so a seat-pool widening cannot bind under PP at all. A future
PP cell needs a configuration where admission actually binds.

Throughput was 18437.25 vs 18005.65 tok/s (−2.34%). With provably identical discrete
scheduling that is this configuration's run-to-run floor, not a result — and it retires any
sub-2.3% claim on a 4-GPU pp=2 GB300 case in either direction.

One thing the run does establish: PP + ADP + overlap with the rank-consistent retiring
marking completed 1920/1920 with no hang and no stage divergence. That is safety evidence
for the reverted commit, not benefit evidence — which is exactly why it is reverted rather
than kept.

5. Existing coverage this relies on

tests/unittest/llmapi/test_llm_pytorch.py / test_llm_api_pytorch.py's pp4 and tp2pp2
accuracy cases run ADP with the overlap scheduler; a stage-divergence bug shows up there as a
hang or a token divergence. They pass unchanged, which is the expected outcome now that the
PP gate is closed.

PR Checklist

• PR title follows [JIRA/NVBUG/None][type] Summary
• All commits signed off (DCO)
• Test cases provided for the new code paths (§1 above), with a negative control
• No API changes — create_torch_sampler_args and ADPRouter.create are internal
• No new dependencies
• pre-commit clean on all changed files (yapf 0.43.0, ruff 0.9.4, ruff-format)
• Please check this after reviewing the above items as appropriate for this PR.

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Dev Engineer Review

• ADP routing excludes GENERATION_TO_COMPLETE requests from load and token calculations.
• Retiring requests remain available for liveness and idle-wait decisions.
• BindCapacityScheduler stops scheduling at GENERATION_TO_COMPLETE.
• LoRA adapter pages remain accounted for retiring requests without consuming request or token capacity.
• Attention-DP overlap sequence-slot headroom applies to non-PP deployments when overlap scheduling is enabled.
• Encoder CUDA graph handling adds feature-mode support, validation, warmup, capture, and eager fallback.
• Speculative-decoding metadata and resource managers use the expanded sequence-slot pool centrally.
• No configuration or test-list changes were identified.
• Speculative-decoding batch-size handling remains out of scope.

QA Engineer Review

• Updated test_adp_router.py for retiring-request filtering and pipeline-parallel behavior.
• Updated test_kvcache_aware_router.py for active, retiring, in-transfer, and rank-state handling.
• Updated test_py_executor.py for encoder batching and ADP padding behavior.
• Updated test_seq_slot_sizing.py for attention-DP overlap headroom.
• Updated test_benchmark_disagg.py fixtures for router-aware padding.
• Added test_spec_slot_pool_sizing.py coverage for centralized slot-pool sizing, fallback behavior, builder signatures, MTP hidden-state sizing, and overlap turnover.
• Added C++ capacity-scheduler coverage for retiring-request LoRA adapter accounting.
• No tests/integration/test_lists/, test-db/, or qa/ changes were identified.
• CI or manual QA list coverage is unavailable from the provided changes.
• Verdict: needs follow-up.

[chenfeiz0326]

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Walkthrough

The change generalizes attention-DP overlap headroom, separates retiring requests from routable load, adds fixed-shape feature encoder CUDA graph support, propagates sequence-slot capacity through speculative decoding, and preserves PEFT residency accounting for retiring requests.

Changes

Attention-DP executor behavior

Layer / File(s)	Summary
General attention-DP overlap headroom tensorrt_llm/_torch/pyexecutor/_util.py, tensorrt_llm/_torch/pyexecutor/model_engine.py, tensorrt_llm/_torch/pyexecutor/py_executor_creator.py, tensorrt_llm/_torch/speculative/*, tests/unittest/_torch/executor/test_seq_slot_sizing.py, tests/unittest/_torch/speculative/test_spec_slot_pool_sizing.py	Sequence-slot capacity, speculative metadata, guided decoder sizing, and tests use the general attention-DP overlap condition.
Retiring-request routing state tensorrt_llm/_torch/pyexecutor/scheduler/adp_router.py, tensorrt_llm/_torch/pyexecutor/scheduler/scheduler.py, tests/unittest/_torch/executor/test_adp_router.py, tests/unittest/_torch/executor/test_kvcache_aware_router.py	Routing excludes GENERATION_TO_COMPLETE requests from active load and records them in RankState.num_retiring_requests. Capacity scheduling stops at the same state.
Executor liveness and transfer accounting tensorrt_llm/_torch/pyexecutor/py_executor.py, tests/unittest/_torch/executor/test_py_executor.py, tests/unittest/_torch/executor/test_benchmark_disagg.py	Liveness includes resident retiring requests, ADP capacity checks use routable requests, encoder batching recognizes feature graph runners, and transfer handling reads structured status fields.

Fixed-shape encoder CUDA graphs

Layer / File(s)	Summary
Encoder graph discovery and contracts tensorrt_llm/_torch/pyexecutor/model_engine.py	Token buckets and feature shapes are validated. Eligible graph configurations and encoder capacity are resolved separately from decoder graph pools.
Feature staging and graph capture tensorrt_llm/_torch/pyexecutor/model_engine.py	Feature inputs use pinned staging and asynchronous copies. Feature-mode warmup and capture use fixed-shape encoder inputs.
Encoder graph batching and replay tensorrt_llm/_torch/pyexecutor/py_executor.py, tensorrt_llm/_torch/pyexecutor/model_engine.py, tests/unittest/_torch/executor/test_py_executor.py	Feature batching uses resolved captured sizes. Runtime replay supports padding, eager fallback, warnings, and cloned outputs.

Retiring LoRA adapter residency

Layer / File(s)	Summary
PEFT page preclaim during retirement cpp/tensorrt_llm/batch_manager/capacityScheduler.cpp, cpp/tests/unit_tests/batch_manager/capacitySchedulerTest.cpp	Capacity schedulers retain PEFT page charges for kGENERATION_TO_COMPLETE requests while excluding those requests from scheduling. Tests cover adapter reuse and rejection when pages are exhausted.

Estimated code review effort: 4 (Complex) | ~60 minutes

Merge Risk: 🔵 Low · up to e440a

This PR stops retiring requests from consuming admission capacity while preserving liveness and resource cleanup, improving throughput for overlap-enabled workloads. It is mergeable with explicit owner awareness that mixed-version rollout or rollback could create distributed scheduling disagreement because the exchanged rank-state layout is not versioned; two minor maintainability follow-ups also remain.

Sequence Diagram(s)

sequenceDiagram
  participant PyExecutor
  participant ModelEngine
  participant EncoderGraphRunner
  participant CUDA
  PyExecutor->>ModelEngine: resolve feature graph batch size
  PyExecutor->>ModelEngine: submit feature encoder batch
  ModelEngine->>CUDA: copy staged features on dedicated stream
  ModelEngine->>EncoderGraphRunner: capture or replay fixed-shape graph
  EncoderGraphRunner-->>ModelEngine: return encoder outputs
  ModelEngine-->>PyExecutor: return cloned replay outputs

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🚥 Pre-merge checks | ✅ 4 | ❌ 1

❌ Failed checks (1 warning)

Check name	Status	Explanation	Resolution
Docstring Coverage	⚠️ Warning	Docstring coverage is 35.06% which is insufficient. The required threshold is 80.00%. Docstring coverage is scoped to functions touched by this diff. Analyzed 77 functions across 17 files.	Write docstrings for the functions missing them to satisfy the coverage threshold.

✅ Passed checks (4 passed)

Check name	Status	Explanation
Linked Issues check	✅ Passed	Check skipped because no linked issues were found for this pull request.
Out of Scope Changes check	✅ Passed	Check skipped because no linked issues were found for this pull request.
Title check	✅ Passed	The title clearly identifies the NVBugs fix and the main change: excluding retiring requests from ADP admission and capacity accounting.
Description check	✅ Passed	The description is complete and relevant. It explains the bug, implementation scope, deliberate exclusions, test coverage, validation results, and checklist status.

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🧹 Nitpick comments (1)

tensorrt_llm/_torch/pyexecutor/_util.py (1)

2811-2822: 📐 Maintainability & Code Quality | 🔵 Trivial | ⚡ Quick win

Update the stale rationale in compute_max_num_sequences's docstring.

This docstring attributes the sequence-slot headroom exclusively to "Disaggregated attention-DP". The new caller should_enable_adp_overlap_seq_slot_headroom (added at Line 2855) explicitly states the mechanism is "Not gated on disaggregation: the mechanism is a property of overlap plus ADP admission, and was measured on an aggregated context-only run with no cache transceiver configured." Update this docstring so it does not mislead readers into thinking enable_overlap_headroom is still disaggregation-specific.

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In `@tensorrt_llm/_torch/pyexecutor/_util.py` around lines 2811 - 2822, Update the
compute_max_num_sequences docstring to describe enable_overlap_headroom as
applying to overlap plus ADP admission rather than exclusively to disaggregated
attention-DP, while retaining the existing explanation of the additional non-PP
slot set and pipeline-parallel sizing.

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Nitpick comments:
In `@tensorrt_llm/_torch/pyexecutor/_util.py`:
- Around line 2811-2822: Update the compute_max_num_sequences docstring to
describe enable_overlap_headroom as applying to overlap plus ADP admission
rather than exclusively to disaggregated attention-DP, while retaining the
existing explanation of the additional non-PP slot set and pipeline-parallel
sizing.

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[chenfeiz0326]

Second case verified: deepseek-r1 GB300 con4096 dep4 ctx worker

The PR description measures glm-5-fp4_8k1k_con1024_ctx1_dep2_.... #17390 flipped
disable_overlap_scheduler true→false on 21 configs, so here is an
independent second case, chosen because its ctx worker is the same shape at twice
the rank count:

aggr-ctx_only-gb300_deepseek-r1-fp4_8k1k_con4096_ctx1_dep4_gen1_dep16_eplb0_mtp1_ccb-NIXL

ctx worker: max_batch_size: 2, tp/ep 4, pipeline_parallel_size: 1,
enable_attention_dp: true, max_num_tokens: 16384, MTP nextn=1,
cuda_graph_config: null. ADP admission capacity = 4×2 = 8 (glm-5 dep2 gave 4).

Three arms, one Slurm job each, concurrent, matched controls re-measured in the
same session. FIX3 = this PR's semantics (retiring excluded from ADP router load
and admission + no_schedule_after_state=GENERATION_TO_COMPLETE + the seq-slot
headroom that change requires, behind the identical
enable_attention_dp and not has_pp() and not disable_overlap_scheduler gate).

arm	ctx overlap	throughput	vs ON	iters	assigned	forward bs	admission gate
OFF	disabled (pre-#17390)	94047.22	+9.28%	2562	[2,2,2,2]×2559	2×10239	ta=0→max_new=8, popped=8
ON	enabled (#17390)	86061.09	—	5854	[1,0,0,0]×2926 / [0,2,2,2]×2924	0×8783, 2×8775, 1×5862	ta=7→max_new=1 / ta=2→max_new=6
FIX3	enabled + this PR	95857.71	+11.38%	2563	[2,2,2,2]×2559	2×10239, 0×8	ta=0→max_new=8, popped=8

Fully recovered, and +1.93% above the overlap-disabled arm — the same small
overshoot seen on glm-5 (+2.4%), since the capacity fix backfills seats the OFF
arm never had.

The regression here is −8.49%, not glm-5's −20.40%, despite an identical trace
signature. On ON, three of four ranks are assigned nothing on alternating
iterations and 8783 of 26400 forward records have batch size zero.

The control that matters. A recovery whose state histogram loses state 14 would
mean the workload changed, not that the accounting was fixed. It does not:

ON     states: (empty)x8786 | GENERATION_TO_COMPLETE(14)x2 x8775 | (14)x1 x2930 | CONTEXT_INIT(10)x1 (14)x1 x2925
FIX3   states: GENERATION_TO_COMPLETE(14)x2 x10239 | (empty)x11 | (14)x1 x2

FIX3 carries two retiring requests per rank in essentially every iteration —
more consistently than ON — and still reports ta=0, max_new=8. The limbo
requests are still resident; they are simply no longer charged. tokens_in stays
[16384,16384,16384,16384] (vs [0,0,0,0] on OFF), confirming
num_active_tokens is deliberately left raw because the KV is still there.

No NoFreeSlotsError: the headroom gate fires correctly for this topology.

Noise floor. Both controls replicate across sessions on different nodes:
ON 86123.34 → 86061.09 (0.07%), OFF 94715.77 → 94047.22 (0.71%). The 11.38%
recovery is ~16× the larger of those.

Nodes were nvl72d020 / nvl72d090 / nvl72d140 — not same-node pinned, but the
sub-1% cross-session, cross-node replication of both controls rules out node
variance as an explanation for an 11% effect.

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⚠️ Outside diff range comments (3)

tensorrt_llm/_torch/pyexecutor/model_engine.py (1)

8524-8525: 📐 Maintainability & Code Quality | 🟡 Minor | ⚡ Quick win

Correct the documented return shape.

The docstring states the return is [padded_batch, fixed_seq_len, hidden]. _forward_step_encoder returns the encoder output unchanged, and the encoder produces packed hidden states shaped [sum(seq_lens), hidden]. _maybe_forward_encoder_graph relies on that packed layout when it slices output[:real_tokens] at Line 8456. The 3-D description contradicts the slicing that depends on it.

📝 Proposed docstring fix

         Returns:
-            Encoder hidden states, `[padded_batch, fixed_seq_len, hidden]`.
+            Packed encoder hidden states,
+            `[padded_batch * fixed_seq_len, hidden]`.
         """

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In `@tensorrt_llm/_torch/pyexecutor/model_engine.py` around lines 8524 - 8525,
Correct the return-shape documentation for _forward_step_encoder to describe
packed encoder hidden states as [sum(seq_lens), hidden] instead of a padded 3-D
tensor, matching the unchanged encoder output and _maybe_forward_encoder_graph
slicing behavior.

tests/unittest/_torch/executor/test_py_executor.py (2)

204-204: 📐 Maintainability & Code Quality | 🟡 Minor | ⚡ Quick win

Add type annotations to the added functions.

The added helpers and test functions omit parameter and return annotations. Add precise collection types and -> None for test procedures. Use the executor type for helper return values.

As per coding guidelines: “Annotate every function, use None for procedures, ... use precise Callable arguments.”

Also applies to: 228-230, 255-255, 313-315, 332-332, 348-348, 2139-2139, 2161-2161

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In `@tests/unittest/_torch/executor/test_py_executor.py` at line 204, Add complete
type annotations to the added helpers and tests, including precise collection
and Callable parameter types, Executor return types for helper factories, and ->
None for test procedures. Apply this consistently to
_make_encoder_batch_wait_executor and the other newly added functions identified
in the diff.

Source: Coding guidelines

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301-315: 📐 Maintainability & Code Quality | 🟡 Minor | ⚡ Quick win

Provide CBTS coverage evidence for the five added tests.

The tests are covered by directory-level CI entries in tests/integration/test_lists/test-db, including l0_cpu.yml and l0_h100.yml. QA lists do not need to mirror CI lists. No cbts_touchmap.sqlite or CBTS coverage report was supplied. Coverage verdict: needs follow-up.

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In `@tests/unittest/_torch/executor/test_py_executor.py` around lines 301 - 315,
Provide CBTS coverage evidence for all five added tests, referencing the
applicable directory-level CI entries under
tests/integration/test_lists/test-db, including l0_cpu.yml and l0_h100.yml. Add
or attach the required coverage mapping/report, such as cbts_touchmap.sqlite, so
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Outside diff comments:
In `@tensorrt_llm/_torch/pyexecutor/model_engine.py`:
- Around line 8524-8525: Correct the return-shape documentation for
_forward_step_encoder to describe packed encoder hidden states as
[sum(seq_lens), hidden] instead of a padded 3-D tensor, matching the unchanged
encoder output and _maybe_forward_encoder_graph slicing behavior.

In `@tests/unittest/_torch/executor/test_py_executor.py`:
- Line 204: Add complete type annotations to the added helpers and tests,
including precise collection and Callable parameter types, Executor return types
for helper factories, and -> None for test procedures. Apply this consistently
to _make_encoder_batch_wait_executor and the other newly added functions
identified in the diff.
- Around line 301-315: Provide CBTS coverage evidence for all five added tests,
referencing the applicable directory-level CI entries under
tests/integration/test_lists/test-db, including l0_cpu.yml and l0_h100.yml. Add
or attach the required coverage mapping/report, such as cbts_touchmap.sqlite, so
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[Shixiaowei02]

Possible correctness issue. Please help investigate and fix.

[chenfeiz0326]

Part 2 pushed: one seat coefficient for every seat-indexed pool

Three commits on top of the reviewed part 1, plus a merge of main. The PR description is
updated with the full argument; the short version:

• The defect class, not the number. The count of simultaneously-live sequences was
  re-derived from max_batch_size in six places with six different formulas. Part 1 widened
  the seat pool to 2B for aggregated ADP+overlap and left KVCacheManagerV2's index pool at
  B+1, so admission recovered by charges 1 and 2 was handed straight back as
  No free IndexMapper slots → _create_kv_cache returns None → silent deferral. Sites 1–4
  now receive the number instead of recomputing it, and a two-sided validator makes
  either direction of skew a startup ValueError. [None][fix] Size seq-slot pool to cover disagg-gen KV admission #18742 is the mirror image of the same
  invariant (index pool larger than the seat pool ⇒ add_slot raises on the executor's
  event-loop thread), which is why the validator checks equality rather than >=.
• The coefficient is additive in pp_size: B·pp, +B under the overlap headroom,
  max(..., 2·B·pp) under disagg. Five of six reachable cells are byte-identical to
  [https://nvbugs/6627795][fix] stop charging retiring requests against ADP admission and capacity #18457 + [None][fix] Size seq-slot pool to cover disagg-gen KV admission #18742 combined; the sixth (PP with ADP+overlap) is the one intended behaviour
  change, B·pp → (pp+1)·B. Additive rather than multiplicative because the overlap deferral
  is one iteration, not one per stage — and because 2·B·pp would be +100% on draft_probs,
  PenaltyStore.counts_cuda and the pinned-host block offsets, against +25% at pp=4.
• PP required fixing the router, not the sizing. _forward_step_inter_pp now makes the
  same _update_generation_requests_that_will_complete_next_iteration call the last stage
  makes, so every stage derives the retiring count from token counts that are already
  replicated per-iteration. Only then does dropping not mapping.has_pp() buy anything.

Verification (CPU-only, negative control, Slurm job 1890512): whole source files swapped
between arms with per-file byte-identity asserted. Baseline sources: 21 failed / 143 passed
/ 17 skipped, and the 21 are declared in advance as an exhaustive table, so an undeclared
extra failure fails the run. Fixed sources: 0 failed / 210 passed / 17 skipped, with
passed + skipped == 227 collected. Plus 14 declared invariant ids that must pass on both
arms — including the six index-pool cells this PR claims not to move — which is what
distinguishes "the fix works" from "the tests do not bind to the change". LADDER_VERDICT=PASS.
Two of the baseline failure groups fail for a signature reason rather than a behavioural one;
that is called out in the description rather than counted as evidence.

Merge of main (6c7533ea4e) had one conflict, _util.py, where both sides added to
_create_kv_cache_manager — resolved as a union (max_num_seq_slots here,
joint_kv_cache_reuse from main; different consumers, no interaction).

Still outstanding, and I will post the numbers here rather than merge without them: the
GPU A/B for part 2 on GB300 — aggregated ctx_only with use_kv_cache_manager_v2: true to
show the No free IndexMapper slots starvation disappears, and a new PP arm to justify the
PP cell. Kill criterion stated up front: if the baseline PP arm shows no admission shortfall,
the PP cell is unmotivated and I will drop it and keep only the refactor.

Also corrected one of my own earlier claims in this thread: two-model spec decode is not
inert with respect to this plumbing — the target engine caches the pool before the two-model
overlap force-off, 62 lines later. Details in
#18457 (comment).

[chenfeiz0326]

/bot run

[tensorrt-cicd]

PR_Github #71987 [ run ] triggered by Bot. Commit: 6c7533e Link to invocation

[chenfeiz0326]

Pushed 166cf0ffee: pre-commit was failing on 6c7533ea4e (yapf, ruff I001, ruff-format) and that commit fixes it. Four files, formatting only.

Worth one line on why it failed, since three of the four were already non-conforming before this branch: pre-commit runs over the files changed against the base, so a file's existing formatting only enters scope once a commit touches it. Only test_spec_slot_pool_sizing.py was my own error — a new NoFreeSlotsError import in the wrong sort position.

Not asserted by eye. For speculative/utils.py, test_pp_retiring_rank_consistency.py and test_seq_slot_sizing.py the AST is identical to the parent commit both with and without docstrings; for test_spec_slot_pool_sizing.py the multiset of import nodes and the whole non-import body are identical, the diff being one import line moving up. So the CPU negative-control ladder in the description still describes this tree and did not need re-running. Local yapf and ruff are the versions pinned in .pre-commit-config.yaml (v0.43.0 / v0.9.4), so this is what CI computes rather than an approximation.

/bot run below re-targets the new head; the in-flight PR_Github #71987 is on 6c7533ea4e and differs only by the above.

[chenfeiz0326]

/bot run

[tensorrt-cicd]

PR_Github #71988 [ run ] triggered by Bot. Commit: 166cf0f Link to invocation

[tensorrt-cicd]

PR_Github #71987 [ run ] completed with state ABORTED. Commit: 6c7533e

Link to invocation

[tensorrt-cicd]

PR_Github #71988 [ run ] completed with state SUCCESS. Commit: 166cf0f
/LLM/main/L0_MergeRequest_PR pipeline #59049 completed with status: 'FAILURE'

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[chenfeiz0326]

PP cell: measured, and dropped

I said in this comment that I would post the numbers before asking anyone to accept the pipeline-parallel half of this change. They came back negative, so the PP cell is out and the two commits that implemented it are reverted (4030e8e1be, f498e0f49b). What stays is the refactor: one seat coefficient, the seat count plumbed into its consumers, and a two-sided startup validator. Current scope is the five equivalence-table cells that are byte-identical to today plus the aggregated non-PP fix that was already verified.

The A/B that killed it

A generation-bearing case was needed, because the earlier ctx_only PP pair could not respond either way (requests retire on the context path, which every rank already marks). New aggregated case: GLM-5 NVFP4, 4-way GB300, tp=2 pp=2 ep=2, ADP on, overlap on, max_batch_size=4, max_num_tokens=8192, ISL 1024 / OSL 8, concurrency 32 x 60 iterations. Both arms COMPLETED 0:0, 1920/1920 successful requests, ~13.5 min each.

Arm identity is non-vacuous, proven two independent ways:

	index-pool banner	executor banner
unpatched	IndexMapper capacity=9 (max_num_sequences=8, num_reserved_index_slots=1)	max_num_requests=8
patched	IndexMapper capacity=13 (max_num_sequences=8, max_num_seq_slots=12, ...)	max_num_requests=12

The scheduling is not "similar", it is identical — 1925 iteration records parsed on each arm with 0 unparsed:

metric	unpatched	patched
steady mean num_scheduled_requests (cap 4)	3.997	3.997
histogram (steady)	{0: 1, 3: 1, 4: 1731}	{0: 1, 3: 1, 4: 1731}
num_ctx_requests histogram	{0: 1409, 1: 108, 3: 108, 4: 108}	{0: 1409, 1: 108, 3: 108, 4: 108}
No free IndexMapper slots	0	0
V2-path control (excluding the mechanism's own message)	72	72

The pre-registered gate was "the patched arm must show a higher mean scheduled batch size", with the kill criterion "if the unpatched arm shows no admission shortfall, the PP cell is unmotivated". Both arms sit at 3.997 of 4. Killed.

Why it cannot bind, which is the part worth keeping: admission is capped independently at pp_size * max_batch_size = 8 by get_max_num_sequences(), and the unpatched index pool is pp_size * max_batch_size + 1 = 9. The unpatched arm therefore has slack and never throttles — the per-micro-batch batch size, not the seat pool, is the limiter. That is structurally different from pp_size=1, where retiring requests accumulate to ~B so demand reaches 2B against a pool of B+1 (the 3412 -> 0 result below). A PP cell needs a case where admission is the binding constraint; I have recorded this in the gate's docstring so the next attempt starts from the number rather than the argument.

Throughput was 18437.25 vs 18005.65 tok/s, i.e. -2.34%. Given provably identical discrete scheduling, that is this configuration's run-to-run floor, not a result — and it retires any sub-2.3% claim on this case in either direction.

One thing the run does establish: PP + ADP + overlap with the rank-consistent retiring marking completed 1920/1920 with no hang and no stage divergence. That is safety evidence for the reverted commit, not benefit evidence, which is why it is reverted rather than kept.

What the aggregated (non-PP) fix does, framed as correctness

I am not claiming the +0.87% from the earlier pair; the paired noise floor there, measured from two arms whose discrete metrics were provably identical, was 0.37% and that is too close to lean on. The defensible result is the mechanism, which is discrete and not a measurement at all:

• No free IndexMapper slots deferrals: 3412 -> 0
• mean scheduled batch: 1.5 -> 2.0 (i.e. the admission the seat-pool widening bought is no longer handed straight back by the index pool)

The +26% figure from earlier in this PR belongs to part 1 (the seat-pool widening itself), not to this index-pool change.

Two incidental findings from the harness, not this PR

• The index-pool exhaustion warning prints its %d/%d uninterpolated, and attributes the shortfall to disaggregation even on an aggregated run with no transceiver configured — which is exactly the wrong place to look. Worth a one-liner.
• _get_aggr_commands does not numactl-bind, so any unbound single-GPU Grace case inherits host-page-placement variance.

CI

8ffd77b416 fixes the four CPU-Generic-x86-1 failures from the previous head. All four were the same mistake in different guises — new code reading an attribute the real object always has, from a hand-built test double that does not: a Mock's auto-created max_admissible_sequences being ordered against an int; llm_args.disable_overlap_scheduler evaluated eagerly at a call site on the two branches that never use it; and one object.__new__(KvCacheCreator) in the estimation tests missing _model_engine. The resolver now takes llm_args whole and reads the field only inside the fallback, with a test that drives the short-circuit branches against an args object which raises on any attribute access — asserting on the return value alone could not distinguish "not used" from "used and happened to agree".

[chenfeiz0326]

/bot run

[tensorrt-cicd]

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[tensorrt-cicd]

PR_Github #72053 [ run ] completed with state FAILURE. Commit: 8ffd77b
/LLM/main/L0_MergeRequest_PR pipeline #59111 completed with status: 'UNSTABLE'

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[chenfeiz0326]

/bot run

[tensorrt-cicd]

PR_Github #72144 [ run ] triggered by Bot. Commit: c1c619e Link to invocation

[tensorrt-cicd]

PR_Github #72144 [ run ] completed with state SUCCESS. Commit: c1c619e
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CI Report

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Multi-GPU tests require the ci: full pre-merge approved label on this PR. Ask a member of NVIDIA/trt-llm-ci-approvers to add the label, then re-trigger CI with the same bot command (no rebase needed).

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[chienchunhung]

Thanks for the PR. I found an issue wrt overlap enablement/disablement; happy to take another look once addressed.

[chienchunhung]

IIRC At this point llm_args.disable_overlap_scheduler still contains the requested value. For two-model speculative decoding, has_draft_model_engine is known at py_executor_creator.py:488, but overlap is only force-disabled after both engines are constructed, at line 632. Consequently, attention-DP with overlap requested caches max_num_seq_slots == 2 * max_batch_size even though runtime overlap is disabled and those extra seats can never be used.

Please apply the effective two-model overlap setting before constructing either engine.

[mikeiovine]

This two-model path is disabled completely now (API forces you to one-model with a warning if you try to use it). We're still incrementally removing the code; sorry it's taking so long! But, IMO, not worth fixing