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[None][test] Handle MiniMax-M3 FP8 rounding variance - #17227

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brb-nv merged 1 commit into
NVIDIA:feat/m3_with_msafrom
peihu-nv:peihengh/m3-fp8-test-tolerance-20260803
Aug 4, 2026
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[None][test] Handle MiniMax-M3 FP8 rounding variance#17227
brb-nv merged 1 commit into
NVIDIA:feat/m3_with_msafrom
peihu-nv:peihengh/m3-fp8-test-tolerance-20260803

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@peihu-nv peihu-nv commented Aug 3, 2026

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@coderabbitai summary

Description

The MiniMax-M3 FP8 indexer and direct KV-insertion tests compared Q/K outputs byte-for-byte with the general fused QK-norm/RoPE reference. The specialized kernels use powf for RoPE frequencies, while the optimized reference uses the mathematically equivalent exp2f/log2f formulation. A small number of values can consequently round to adjacent E4M3 values and fail byte equality despite satisfying the intended FP8 numerical contract.

Compare only normalized/RoPE Q and K numerically using the tolerance already established by the horizontal-producer test. V conversion, cache destinations, guard pages, and CUDA Graph replay updates remain exact. Add the standalone indexer, direct KV-insertion, and active horizontal-producer tests to the B200 MiniMax-M3 pre-merge test list.

Test Coverage

  • Focused B300 validation reproduced every reported shape and confirmed that Q/K differences remain within the established FP8 tolerance; V outputs and cache guard pages remain byte-exact, with no NaNs.
  • CUDA Graph replay validation confirms outputs update from replay inputs and cache writes remain correct.
  • Changed-files pre-commit checks pass, including Python formatting/linting, YAML validation, and test-list entry validation.

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  • Please check this after reviewing the above items as appropriate for this PR.

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Signed-off-by: peihengh <259410613+peihu-nv@users.noreply.github.com>
@peihu-nv

peihu-nv commented Aug 3, 2026

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/bot run

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PR_Github #63569 [ run ] triggered by Bot. Commit: a427a7e Link to invocation

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PR_Github #63569 [ run ] completed with state SUCCESS. Commit: a427a7e
/LLM/main/L0_MergeRequest_PR pipeline #51534 completed with status: 'SUCCESS'

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@brb-nv brb-nv left a comment

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LGTM.

@brb-nv
brb-nv merged commit 617284f into NVIDIA:feat/m3_with_msa Aug 4, 2026
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brb-nv pushed a commit to brb-nv/TensorRT-LLM that referenced this pull request Aug 25, 2026
Signed-off-by: peihengh <259410613+peihu-nv@users.noreply.github.com>
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4 participants