[https://nvbugs/6402048][test] Skip MXFP8 CUTLASS MoE with non-128-aligned per-shard intermediate

tests/integration/test_lists/test-db/l0_dgx_b200.yml

@@ -83,6 +83,7 @@ l0_dgx_b200:
   - unittest/_torch/modules/moe/test_moe_module.py::test_configurable_moe_multi_gpu -k "CUTLASS and NVFP4"
   - unittest/_torch/modules/moe/test_moe_module.py::test_configurable_moe_multi_gpu -k "CUTLASS and W4A8_MXFP4_MXFP8"
   - unittest/_torch/modules/moe/test_moe_module.py::test_configurable_moe_multi_gpu -k "CUTLASS and W8A16"
+  - unittest/_torch/modules/moe/test_moe_module.py::test_configurable_moe_multi_gpu -k "CUTLASS and MXFP8 and not W4A8"
   # --- TRTLLM ---
   - unittest/_torch/modules/moe/test_moe_module.py::test_configurable_moe_multi_gpu -k "TRTLLM and NVFP4 and not W4A8"
   - unittest/_torch/modules/moe/test_moe_module.py::test_configurable_moe_multi_gpu -k "TRTLLM and FP8_BLOCK_SCALES"
@@ -346,7 +347,7 @@ l0_dgx_b200:
   - disaggregated/test_disaggregated.py::test_disaggregated_mamba_conc_greater_than_mbs[NVIDIA-Nemotron-3-Super-120B-A12B-FP8]
   - accuracy/test_llm_api_pytorch.py::TestDeepSeekV32::test_nvfp4_attn_multi_gpus TIMEOUT (60)
   # ---- FP8 per-tensor (QDQ) moved to post-merge; block-scale/W4A8 stay in pre ----
-  - unittest/_torch/modules/moe/test_moe_module.py::test_configurable_moe_multi_gpu -k "CUTLASS and FP8 and not FP8_BLOCK_SCALES and not W4A8"
+  - unittest/_torch/modules/moe/test_moe_module.py::test_configurable_moe_multi_gpu -k "CUTLASS and FP8 and not FP8_BLOCK_SCALES and not W4A8 and not MXFP8"
 # ------------- AutoDeploy Backend Stages ---------------
 - condition:
     ranges:

tests/integration/test_lists/waives.txt

@@ -590,7 +590,6 @@ triton_server/test_triton_llm.py::test_mistral_v1_multi_models[False-1---False-T
 triton_server/test_triton_rcca.py::test_rcca_bug_4934893[Temperature:0.5-TOP_P:0.95-TOP_K:10-False-1---False-True-False-0-2048-enableDecoupleMode-inflight_fused_batching-disableTrtOverlap--max_utilization---1-1-1-False-ensemble] SKIP (https://nvbugs/5619369)
 unittest/_torch/misc/test_autotuner.py::test_autotuner_distributed_strategy SKIP (https://nvbugs/6321874)
 unittest/_torch/modules/moe/test_moe_backend.py::test_moe_backend[act=Relu2-e60_k4_h2048_i1408-seq=8-dtype=torch.bfloat16-backend=TRTLLM-quant=NVFP4-routing=Renormalize] SKIP (https://nvbugs/5989912)
-unittest/_torch/modules/moe/test_moe_module.py::test_configurable_moe_multi_gpu -k "CUTLASS and FP8 and not FP8_BLOCK_SCALES and not W4A8" SKIP (https://nvbugs/6402048)
 unittest/_torch/modules/tests_lora_modules/test_lora_attention_pytorch_flow_vs_trt.py::TestLoraAttentionPytorchFlowVsTRT::test_lora_attention SKIP (https://nvbugs/5701421)
 unittest/_torch/multi_gpu/test_mnnvl_allreduce.py::test_mnnvl_nvfp4_rejects_fp32_before_launch[2] SKIP (https://nvbugs/6396420)
 unittest/_torch/ray_orchestrator/multi_gpu/test_llm_update_weights_multi_gpu.py -m "part0" SKIP (https://nvbugs/6372711)

tests/unittest/_torch/modules/moe/moe_test_utils.py

@@ -691,19 +691,24 @@ def should_skip_cutlass(
     if backend_type != MoeBackendType.CUTLASS:
         return None
 
-    # TP per-shard alignment: W8A16, NVFP4, and W4A8_AWQ require 128-aligned
-    # per-shard intermediate_size. W8A16 fails in preprocess_weights_for_mixed_gemm
-    # (num_rows % rows_per_tile != 0). NVFP4 pads to 128-alignment
-    # (NVFP4_ROW_ALIGNMENT in quantization.py:2312) but zero-padding +
-    # blockwise quantization interaction causes ~6-7% mismatch.
+    # TP per-shard alignment: W8A16, NVFP4, W4A8_AWQ, and MXFP8 require
+    # 128-aligned per-shard intermediate_size. W8A16 fails in
+    # preprocess_weights_for_mixed_gemm (num_rows % rows_per_tile != 0). NVFP4
+    # pads to 128-alignment (NVFP4_ROW_ALIGNMENT in quantization.py:2312) but
+    # zero-padding + blockwise quantization interaction causes ~6-7% mismatch.
     # W4A8_AWQ (WInt4AFP8FusedMoEMethod) requires K dimensions to be multiples
     # of 128 on SM90 for interleave factor selection (quantization.py:1310-1324).
+    # MXFP8 (MXFP8CutlassFusedMoEMethod) hard-asserts
+    # intermediate_size_per_partition % 128 == 0 in create_weights for its
+    # int32 UE8M0 SF packing, so a non-128-aligned per-shard intermediate
+    # raises AssertionError.
     # W4A8_MXFP4_MXFP8 uses MXFP4 auto-padding that handles this correctly.
     if moe_tp_size > 1 and model_config is not None:
         tp_alignment_quants = {
             QuantAlgo.W8A16,
             QuantAlgo.NVFP4,
             QuantAlgo.W4A8_AWQ,
+            QuantAlgo.MXFP8,
         }
         # FP8_BLOCK_SCALES has this issue only on Hopper (SM90)
         if torch.cuda.get_device_capability(0) == (9, 0):