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Avoid passing -1 sentinels into inference kernels - #6481

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tdene merged 2 commits into
NVIDIA:mainfrom
tdene:tde/engine_sl_boundary_ima
Aug 13, 2026
Merged

Avoid passing -1 sentinels into inference kernels#6481
tdene merged 2 commits into
NVIDIA:mainfrom
tdene:tde/engine_sl_boundary_ima

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@tdene tdene commented Aug 12, 2026

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  • I, the PR author, have personally reviewed every line of this PR.

What does this PR do?

There's another instance of another -1 being used as a sentinel value to mean "last item" according to Python semantic, but being read by kernels as a literal -1 value.

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Signed-off-by: Teodor-Dumitru Ene <teodord.ene@gmail.com>
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@svcnvidia-nemo-ci svcnvidia-nemo-ci added the Final Review PR is in the "final review" stage label Aug 12, 2026
@svcnvidia-nemo-ci svcnvidia-nemo-ci added Approved All necessary approvals have been made and removed Final Review PR is in the "final review" stage labels Aug 13, 2026
Signed-off-by: Teodor-Dumitru Ene <teodord.ene@gmail.com>
@tdene
tdene added this pull request to the merge queue Aug 13, 2026
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🔄 Merge queue validation started!

You can track the progress here: https://github.com/NVIDIA/Megatron-LM/actions/runs/31699900672

Merged via the queue into NVIDIA:main with commit 487bb39 Aug 13, 2026
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@tdene
tdene deleted the tde/engine_sl_boundary_ima branch August 13, 2026 14:07
ksivaman pushed a commit to ksivaman/Megatron-LM that referenced this pull request Sep 1, 2026
Signed-off-by: Teodor-Dumitru Ene <teodord.ene@gmail.com>
Co-authored-by: Jorge Albericio <jalbericiola@nvidia.com>
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