Add cos/sin width guard to fused MLA RoPE kernels - #5497
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The fused MLA RoPE kernels read emb_dim cos/sin values per token and assume the cache is emb_dim wide. When the rotary cache is built with rotary_percent < 1, the base RotaryEmbedding shrinks it to int(emb_dim * rotary_percent), which is narrower than emb_dim. The kernel then reads past the buffer, picks up uninitialized GPU memory, and produces NaN gradients. Add an explicit check in both ApplyMLARotaryEmbQ.forward and ApplyMLARotaryEmbKV.forward that the cos/sin last dimension equals emb_dim, turning the silent out-of-bounds read into a clear error. Add CPU-only regression tests for the query and key/value kernels. Related to NVIDIA#5317. Signed-off-by: ShauryaaSharma <shauryasofficial27@gmail.com>
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Hey team, its been 2 weeks since the PR is open, Kindly approve the rest of the workflow so that if any errors occur and code change is required, i can proceed with the same. Also, the code has been reviews and approved by: @hxbai |
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/ok to test 3ede266 |
guihong-nv
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One blocking safety issue: the new width guard must remain active in optimized Python; details inline.
assert statements are stripped when Python runs with -O/PYTHONOPTIMIZE=1, which would silently remove this safety check in optimized mode. Replace both guards with an explicit if/raise ValueError so the check always runs. Addresses review feedback from guihong-nv on PR NVIDIA#5497.
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Fixed this now. In if cos.shape[-1] != emb_dim or sin.shape[-1] != emb_dim:
raise ValueError(
f"cos/sin last dim must equal emb_dim={emb_dim} "
f"(got cos={cos.shape[-1]}, sin={sin.shape[-1]}); a narrower rotary cache "
f"(e.g. rotary_percent < 1) makes the fused MLA kernel read past the buffer."
)Also updated the two unit tests to expect Before pushing I double-checked the behavior directly (mismatched width raises, matching width passes through fine, and the asymmetric case where only one of cos/sin is narrow still raises) under both normal and |
What does this PR do ?
Add a width guard to the fused MLA RoPE kernels so an undersized cos/sin cache fails with a clear error instead of silently reading out of bounds.
The fused kernels (
ApplyMLARotaryEmbQ/ApplyMLARotaryEmbKV) reademb_dimcos/sin values per token and assume the cache isemb_dimwide. When the rotary cache is built withrotary_percent < 1, the baseRotaryEmbeddingshrinks it toint(emb_dim * rotary_percent), narrower thanemb_dim, and the kernel reads past the buffer, picks up uninitialized GPU memory, and produces NaN gradients. This is reachable onmain:MultiLatentAttentionforwardsrotary_percentinto the baseRotaryEmbeddingforrope_type="rope"(multi_latent_attention.py:184), and the fused branch (:870) calls the kernel regardless of rope type with no width check today (fused_mla_yarn_rope_apply.py:251-255). The guard assertscos.shape[-1] == emb_dim(andsin) in both forward paths, turning a silent ~1e14 out-of-bounds read into an immediate, readable failure.Issue tracking
Linked issue: Related to #5317
This guard makes the failure mode in #5317 loud instead of silent; the root-cause fix for that issue is
rotary_percent = 1.0in the Megatron-Bridge DSv4 config mapping. Independent of #5412, which fixes a separate in-place aliasing bug.Contribution process
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