[recipe] feat: enable THD packing by default for Qwen3.5-VL finetune - #3481
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Flip pack_sequences_in_batch from False to True in the shared _qwen35_vl_apply_common helper used by all Qwen3.5-VL SFT and PEFT recipes. When PP>1 or EP>1 the step function already forces each micro-batch to pad to seq_length; building THD cu_seqlens lets the attention kernel skip padding FLOPs on short samples. Pretrain recipes are unaffected (they route through _qwen3_vl_common). Signed-off-by: Chen Cui <chcui@nvidia.com>
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Light ReviewClean, minimal change — flips Potential issueMTP + in-batch packing interaction: All Qwen3.5-VL SFT/PEFT recipes enable MTP ( Missing test coverageNo existing unit test asserts the value of assert cfg.dataset.pack_sequences_in_batch is TrueThis prevents accidental regression if someone re-adds the Suggested test casesNo perf tests impacted. The perf configs under |
…VIDIA-NeMo#3481) Signed-off-by: Chen Cui <chcui@nvidia.com> Signed-off-by: Vasudevan Rengasamy <vrengasamy@nvidia.com>
What does this PR do?
Enable THD sequence packing by default for all Qwen3.5-VL SFT and PEFT recipes so attention skips padding FLOPs on short samples.
Changelog
cfg.dataset.pack_sequences_in_batchfromFalsetoTruein_qwen35_vl_apply_common(shared by every Qwen3.5-VL SFT and PEFT recipe)_qwen3_vl_commonand do not set this flagMotivation
When
PP>1orEP>1,qwen3_vl_step.pack_or_pad_batch_sequencesalready setsforce_to_pad_to_seq_len=True, so every micro-batch is padded to the fullseq_length(4096). Without THD, attention computes the fullseq_length^2tile for every sample — documents of ~1000 tokens waste roughly 15x attention FLOPs. Flippingpack_sequences_in_batch=Truebuildscu_seqlens_q/kv(_padded)so flash-attn treats the pad tail as an independent empty segment and skips it. Non-attention layers (MLP, norms, router) still run on the padded positions, but that's a cheaper cost than letting attention eat the pad.Dependency
This change requires Megatron-LM NVIDIA/Megatron-LM#2645 — feat(moe): Support packed sequence for gated delta net (GDN). Qwen3.5-VL uses a hybrid attention/GDN architecture (
experimental_attention_variant='gated_delta_net'), and prior to that PR the GDN block raisedNotImplementedError("GDN does not support packed sequence for now.")atmegatron/core/ssm/gated_delta_net.py:303. This PR should land after the next mcore-main bump that pulls in #2645.Empirical verification
Compared
pack_sequences_in_batch=False(baseline) vsTrue(this PR) on Qwen3.5-VL 2B SFT, cord_v2, 1 node × 8 GPUs, MBS=2, GBS=16, 100 iters, seed=1234, mcore @ NVIDIA/Megatron-LM main (includes #2645).GitHub Actions CI
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