Skip to content

fix: prevent NaN propagation from padding positions in CP>1 loss (#2914) - #3117

Closed
cuichenx wants to merge 1 commit into
mainfrom
chcui/fix-cp-nan-2914
Closed

fix: prevent NaN propagation from padding positions in CP>1 loss (#2914)#3117
cuichenx wants to merge 1 commit into
mainfrom
chcui/fix-cp-nan-2914

Conversation

@cuichenx

@cuichenx cuichenx commented Apr 2, 2026

Copy link
Copy Markdown
Contributor

With context parallelism (CP>1), pad_seq_to_mult introduces padding tokens with loss_mask=0. If the model produces NaN/Inf at those positions, IEEE 754 NaN * 0 = NaN poisons the total loss. Use torch.where to zero out masked positions before summation.

Also set total_tokens in PackedSeqParams so Mamba SSM kernels receive seq_idx for proper state resets at sequence boundaries in packed batches.

What does this PR do ?

Add a one line overview of what this PR aims to accomplish.

Changelog

  • Add specific line by line info of high level changes in this PR.

GitHub Actions CI

See the CI sectionin the Contributing doc for how to trigger the CI. A Nvidia developer will need to approve and trigger the CI for external contributors.

Before your PR is "Ready for review"

Pre checks:

  • Make sure you read and followed Contributor guidelines
  • Did you write any new necessary tests?
  • Did you add or update any necessary documentation?
  • Does the PR affect components that are optional to install? (Ex: Numba, Pynini, Apex etc)
    • Reviewer: Does the PR have correct import guards for all optional libraries?

If you haven't finished some of the above items you can still open "Draft" PR.

Additional Information

  • Related to # (issue)

With context parallelism (CP>1), pad_seq_to_mult introduces padding
tokens with loss_mask=0. If the model produces NaN/Inf at those
positions, IEEE 754 NaN * 0 = NaN poisons the total loss. Use
torch.where to zero out masked positions before summation.

Also set total_tokens in PackedSeqParams so Mamba SSM kernels receive
seq_idx for proper state resets at sequence boundaries in packed batches.

Signed-off-by: Chen Cui <chcui@nvidia.com>
Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
Signed-off-by: Chen Cui <chcui@nvidia.com>
@copy-pr-bot

copy-pr-bot Bot commented Apr 2, 2026

Copy link
Copy Markdown

This pull request requires additional validation before any workflows can run on NVIDIA's runners.

Pull request vetters can view their responsibilities here.

Contributors can view more details about this message here.

@yaoyu-33 yaoyu-33 added bug Something isn't working area:training Training loop, callbacks, and runtime integration labels Apr 2, 2026
@cuichenx

Copy link
Copy Markdown
Contributor Author

fixed in #3484

@cuichenx cuichenx closed this Apr 23, 2026
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment

Labels

area:training Training loop, callbacks, and runtime integration bug Something isn't working

Projects

None yet

Development

Successfully merging this pull request may close these issues.

2 participants