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perf(exl3): accelerate fat-expert prefill - #77

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perf/exl3-fat-prefill-clean
Sep 1, 2026
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MiaAI-Lab merged 4 commits into
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perf/exl3-fat-prefill-clean

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@plotarmordev

@plotarmordev plotarmordev commented Aug 31, 2026 •

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Summary

Accelerate EXL3 routed-expert prefill without changing the decode path:

  • E1: sort routed rows by expert and process fat experts as contiguous batches.
  • E2: add fused direct and scatter CUDA kernels for fat-expert GEMM.
  • Keep the existing thin-expert path and legacy fallback.
  • Expose tiered EXL3_FAT_SORTED, EXL3_FAT_BATCHED, and EXL3_FAT_KERNEL rollout switches; higher tiers imply their prerequisites.

Implementation

  • Patch the pinned exllamav3 extension during the image build and compile exl3_fat_gemm for SM121.
  • Add direct-output and scatter-output bindings.
  • Cache scratch tensors and staged expert counts to avoid repeated allocations on the hot path.
  • Preserve CUDA-graph-safe decode behavior; the new paths apply to fat-expert prefill.
  • Cover direct/scatter parity, isolated legacy/sorted/batched/kernel flag selection, mixed thin/fat composition, and CUDA graph capture.

Verification

Executed from clean PR head 4b8d3c7 based on origin/main 493cb88:

  • Python compilation and launcher syntax checks.
  • Full Docker build with pinned exllamav3 download, extension compilation, binding assertions, and image self-checks.
  • GPU checks for finite EXL3 output, E2 direct/scatter parity, tier isolation, mixed thin/fat composition, and CUDA graph capture.

A local diagnostic follow-up (86e09e0 + f1d1d83, not yet pushed) adds a stable 32-key receipt, both-rank tier/symbol/fallback/call/workspace counters, and fail-closed symbol handling. Its GPU self-check and live on/off/on campaign passed.

Performance evidence — local promotion sequence complete

The original 64K/100K figures remain withdrawn because they included APC hits. The earlier corrected one-shot table was diagnostic only and is superseded by this repeated sequence.

Protocol:

  • 2× DGX Spark GB10, TP=2.
  • Same production checkout, weights, DFlash2 revision, runtime patches, ablation, and image lineage in every arm.
  • Diagnostic image glm53-pr77-diag:e7e1286-v3, derived from proven glm53-fat-e2:validated-20260901 by replacing only vllm/.../quantization/exl3.py and its narrow E2 self-check.
  • MNBT 2048; fused MoE on; row tiles off.
  • Sequence: E2 on → all three tier flags off → E2 on.
  • Five unique-salt cold observations at ~8K, ~100K, and ~300K per boot: 45 accepted cold observations.
  • A row was accepted only with API cached_tokens=0, prefix-cache hit delta 0, local-cache-hit delta 0, and local_compute == prompt_tokens; missing fields fail closed.
  • Throughput is local_compute / TTFT.
Rung On-1 mean (CV) Off mean (CV) On-2 mean (CV) Pooled-on mean Pooled gain
~8K 1125.14 (3.17%) 941.04 (3.00%) 1139.51 (2.34%) 1132.32 +20.33%
~100K 1238.47 (0.24%) 1023.20 (0.40%) 1244.95 (0.09%) 1241.71 +21.36%
~300K 1195.33 (0.62%) 995.05 (0.37%) 1206.71 (0.08%) 1201.02 +20.70%

Boot-specific gains versus the intervening off control were +19.56%/+21.09% at 8K, +21.04%/+21.67% at 100K, and +20.13%/+21.27% at 300K. Every rung has complete separation: the slowest on observation exceeded the fastest off observation.

Engagement and fallback proof

Final receipts were identical across both TP ranks within each boot:

  • On-1: kernel tier active; direct_calls=scatter_calls=555140; kernel calls 43569; batched/sorted/legacy calls 0; one 130027520-byte scratch allocation.
  • Off: legacy tier active; direct/scatter 0; legacy calls 43568; kernel/batched/sorted calls 0; scratch allocations 0.
  • On-2: kernel tier active; direct_calls=scatter_calls=560536; kernel calls 43566; batched/sorted/legacy calls 0; one 130027520-byte scratch allocation.
  • Both on boots reported all E2 symbols present, shared SUH 42/42, capability 12.1, max_rows=2048, zero row-tile calls, and no unintended lower-tier fallback.

All samples, per-arm distributions, exact cache deltas, and diagnostic receipts are in the latest PR comment.

Scope of the conclusion

On this deployment, E2 is genuinely engaged and yields a repeatable ~20–21% fully uncached prefill gain at 8K–300K. The result is not a silent fallback artifact.

A separate deployment previously did not reproduce the 2048 gain. Rollout therefore remains opt-in pending the maintainer deployment running the same diagnostic image/protocol. If its direct/scatter counters are nonzero but performance is neutral, the effect is geometry-sensitive; zero calls or a fallback reason indicates integration drift.

Rollout

Flags select the highest enabled tier:

  • EXL3_FAT_SORTED=1 enables sorted routing.
  • EXL3_FAT_BATCHED=1 enables E1 batching and implies sorted routing.
  • EXL3_FAT_KERNEL=1 enables E2 and implies E1 batching and sorted routing.

Setting all three to 0 restores the legacy fat-expert path.

@plotarmordev

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Corrected zero-cache E2 field matrix

Please treat this comment as a correction to, and replacement for, the cold-prefill performance evidence currently in the PR body. After auditing the earlier 64K/100K receipts, those runs had APC hits and should not be cited as cold-prefill evidence. The implementation/GPU parity checks are unaffected; only the earlier performance methodology is being corrected here.

I reran a four-arm matrix on the local 2× DGX Spark deployment. The same image was used for every arm. Within each fixed-MNBT pair, only the three E2 rollout flags changed; MNBT intentionally differed between the 2048 and 3584 pairs.

Protocol and validity gate

  • 2× DGX Spark GB10, TP=2
  • Image: glm53-fat-e2:validated-20260901
  • EXL3 weights, FP8 KV, 1M context, MAX_NUM_SEQS=4, GPU_MEM_UTIL=0.87
  • DFlash2 k=7, draft TP=2 (dc77ff1c99eeb2df044ee3d4f0094eb033fee410)
  • Abliteration enabled identically in every arm
  • GLM53_MIXED_PREFILL_CHUNK=skip
  • E2 off: EXL3_FAT_SORTED=0, EXL3_FAT_BATCHED=0, EXL3_FAT_KERNEL=0
  • E2 on: all three flags set to 1
  • Unique salt at the beginning of every cold prompt
  • Throughput is local_compute / TTFT, not total prompt tokens divided by TTFT

A cold row was accepted only when all four independently reported conditions held:

  1. API usage cached_tokens == 0
  2. prefix_cache_hits_total delta == 0
  3. local_cache_hit delta == 0
  4. local_compute == prompt_tokens

Missing fields now fail validation. I re-read the stored receipts using that hardened rule: all 30 cold rows contained every required field and passed all four checks. Every cold response returned OK; no cold response contained NaN output.

Controlled four-arm results

Prefill throughput in local-compute tok/s:

Prompt 2048 off 2048 on E2 gain 3584 off 3584 on¹ E2 gain 3584 on vs 2048 on
~8K 787.60 1147.03 +45.64% 859.22 1055.98 +22.90% −7.94%
~12K 953.79 1094.89 +14.79% 965.41 1187.42 +23.00% +8.45%
~16K 979.19 1184.68 +20.99% 974.73 1211.99 +24.34% +2.31%
~100K 1011.77 1205.49 +19.15% 1013.14 1241.51 +22.54% +2.99%
~256K 1008.82 1185.32 +17.50% 1007.40 1211.78 +20.29% +2.23%
~300K 996.65 1173.70 +17.76% 1004.39 1194.81 +18.96% +1.80%

¹ The 3584-on values are the median of two separate boots. The other three arms are one cold ladder each. The 3584-on repeat drift was −3.48%, −2.32%, −1.07%, −1.10%, −0.53%, and +0.57% from 8K through 300K respectively; from 16K onward it stayed within about ±1.1%.

This matrix validates the complete E2-on stack against the legacy flags-off path. It does not separately re-isolate E1 from E2.

Decode check

Median of 5×400-token runs:

Arm Structured tok/s Structured acceptance Prose tok/s Prose acceptance
2048 off 66.72 0.956 27.49 0.328
2048 on 66.10 0.941 29.13 0.367
3584 off 67.00 0.959 29.02 0.354
3584 on² 66.42 0.959 27.24 0.328

² Central value across the two 3584-on boots.

Structured decode is effectively unchanged, consistent with E2 not changing the decode path. Prose moved in opposite directions in the two fixed-MNBT comparisons and tracked DFlash acceptance, so this matrix does not establish a consistent E2 prose cost. One 2048-off prose run triggered the benchmark's lexical nan detector; its separate coherence probe passed, so it was retained but is not treated as evidence of a numerical kernel failure.

README comparison — context only, not a causal A/B

The existing README cold rows are lower than this deployment's current 2048-E2 measurements:

Prompt README Current 2048 E2 Difference
~8K 938 1147 +22.3%
~12K 926 1095 +18.2%
~16K 972 1185 +21.9%
~100K 997 1205 +20.9%
~256K 973 1185 +21.8%
~300K 941 1174 +24.7%

This README comparison is descriptive only: the README rows mix dates and DFlash TP geometry (8K/16K/100K are TP2 C4 measurements; 12K/256K/300K are from the older TP1 ladder). The controlled flags-off/flags-on table above is the causal evidence for E2.

Conclusion and rollout recommendation

On this exact deployment, fully uncached prefill improved by:

  • MNBT 2048: +17.5% to +19.2% at 100K–300K
  • MNBT 3584: +19.0% to +22.5% at 100K–300K

However, 3584 improves over the already-fast 2048-E2 arm by only 1.8%–3.0% at 16K–300K and regresses 8K by 7.9%. I therefore restored production to MNBT 2048 with E2 enabled. MNBT 3584 remains reasonable only for a dedicated long-prefill workload where the extra 2%–3% matters more than short-prompt latency.

These figures are deployment-specific. A separate deployment did not reproduce the 2048 gain, so the PR should retain opt-in rollout flags and should not present the result as universal across GB10 configurations.

Limitations / deviation

  • Only the 3584-on arm received a separate-boot repeat; the other arms are single cold ladders.
  • Matrix restarts used SKIP_OVERLAY_VERIFY=1 because the local checkout's preflight checker asserted compact_block=64 against the already GPU-validated image used for these runs. Each boot still passed runtime overlay installation, server warmup, health checks, generation checks, and the strict per-request cache gate above.

The main corrected result is therefore narrower but defensible: on this deployment, E2 is a real approximately 18%–19% fully uncached 100K–300K prefill improvement at the retained MNBT 2048 setting, while decode remains effectively unchanged.

EXL3_FAT_KERNEL experiments had no way to prove which tier actually ran:
the label survived decode calls, shared-SUH loss silently dropped the
kernel to sorted, and the only symbol check fired mid-prefill.

Add a stable schema (EXL3_FAT_DIAG_KEYS/SCHEMA v1, exl3_fat_diag())
covering configured/effective tier, reason, shared-SUH, symbol
availability, capability, TP identity, fat layers/experts/max rows,
direct/scatter calls, per-tier fallback calls+reasons, and scratch
alloc/current/peak bytes. Counters are integer bumps on the prefill
path only; the label resets every call. Logging stays at load and the
existing 42-layer cadence, never per expert.

Tier resolution happens at weight load, checkpoint cap first: without
shared SUH the tier caps at sorted (the stacked gate+up GEMM shares one
input Hadamard, and sorted needs no fat symbols), whatever the image.
EXL3_FAT_KERNEL=1 with shared SUH but missing fat symbols fails closed
at load with the missing symbol named. Lower tiers stay legitimate
defaults.
_check_e2_diag_static pins the schema key set and the full tier map,
including the precedence: shared-SUH loss returns sorted/
shared_suh_absent even when both fat symbols are missing, while
EXL3_FAT_KERNEL=1 with shared SUH and missing symbols raises (covers
E1 images too). _check_e2_diag measures one accepted E2 fat prefill
from a cleared counter window and asserts every counter exactly:
prefill_layer_calls 1, fallback kernel=1, direct=2, scatter=2,
fat_expert_runs=2, scratch_allocs=1, bytes==peak>0. It then proves a
decode call cannot inherit the kernel label, shared-SUH loss reports
sorted+degraded_shared_suh with no kernel calls, and row tiles preempt
the tier visibly.
@plotarmordev

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PR #77 local promotion sequence — valid on/off/on evidence

This replaces the earlier under-repeated local promotion claim. The original APC-contaminated table remains withdrawn.

Exact arm contract

  • 2× DGX Spark GB10, TP=2; same production checkout, weights, DFlash2 revision, cache patches, ablation, and image lineage in every arm.
  • Diagnostic image: glm53-pr77-diag:e7e1286-v3, derived from the proven glm53-fat-e2:validated-20260901 image by replacing only vllm/.../quantization/exl3.py and its narrow E2 self-check.
  • MAX_NUM_BATCHED_TOKENS=2048, fused MoE on, row tiles off.
  • Sequence: E2 on → all three tier flags off → E2 on.
  • Five independently salted cold observations at ~8K, ~100K, and ~300K per boot: 45 accepted cold observations total.
  • Cold acceptance required API cached_tokens=0, prefix-cache hit delta 0, local-cache-hit delta 0, and local_compute == prompt_tokens. Missing fields fail closed.
  • One explicit ~8K APC follow-up per arm was collected to prove the gate detects cache reuse; those rows are excluded below.

Distribution summary

Compute throughput is local_compute / TTFT.

Rung On-1 mean (CV) Off mean (CV) On-2 mean (CV) Pooled-on mean Pooled gain vs off Separation
~8k 1125.14 (3.17%) 941.04 (3.00%) 1139.51 (2.34%) 1132.32 +20.33% min(on) 1065.28 > max(off) 959.17
~100k 1238.47 (0.24%) 1023.20 (0.40%) 1244.95 (0.09%) 1241.71 +21.36% min(on) 1235.65 > max(off) 1025.31
~300k 1195.33 (0.62%) 995.05 (0.37%) 1206.71 (0.08%) 1201.02 +20.70% min(on) 1183.50 > max(off) 997.38

Boot-specific gains versus the intervening off control:

Rung On-1 vs off On-2 vs off
~8k +19.56% +21.09%
~100k +21.04% +21.67%
~300k +20.13% +21.27%

Every rung has complete distribution separation: the slowest on observation is faster than the fastest off observation.

Engagement diagnostics

Final cumulative receipts were identical across TP ranks within each boot:

  • On-1: configured_tier=kernel effective_tier=kernel tier_reason=kernel_ok; direct_calls=scatter_calls=555140; kernel fallbacks 43569; batched/sorted/legacy fallbacks 0; row-tile calls 0; scratch allocated once, 130027520 bytes.
  • Off: configured_tier=legacy effective_tier=legacy tier_reason=none_requested; direct_calls=scatter_calls=0; legacy fallbacks 43568; kernel/batched/sorted fallbacks 0; row-tile calls 0; scratch allocations/bytes 0.
  • On-2: configured_tier=kernel effective_tier=kernel tier_reason=kernel_ok; direct_calls=scatter_calls=560536; kernel fallbacks 43566; batched/sorted/legacy fallbacks 0; row-tile calls 0; scratch allocated once, 130027520 bytes.
  • Both on boots: all three symbols present, shared SUH 42/42, SM capability 12.1, max_rows=2048, and no unintended lower-tier fallback.

All accepted cold observations

hitΔ = prefix_cache_hits_total delta; local_hitΔ = local cache-hit delta.

Arm Rung n Prompt tokens TTFT s Compute tok/s cached hitΔ local_hitΔ local_compute
on-1 ~8k 1 7995 7.505041 1065.28 0 0 0 7995
on-1 ~8k 2 7998 7.148351 1118.86 0 0 0 7998
on-1 ~8k 3 7998 6.965966 1148.15 0 0 0 7998
on-1 ~8k 4 7999 6.957171 1149.75 0 0 0 7999
on-1 ~8k 5 7998 6.993345 1143.66 0 0 0 7998
on-1 ~100k 1 99995 80.904535 1235.96 0 0 0 99995
on-1 ~100k 2 100002 80.581414 1241.01 0 0 0 100002
on-1 ~100k 3 100001 80.503429 1242.20 0 0 0 100001
on-1 ~100k 4 100004 80.810134 1237.52 0 0 0 100004
on-1 ~100k 5 99999 80.928153 1235.65 0 0 0 99999
on-1 ~300k 1 299995 253.481721 1183.50 0 0 0 299995
on-1 ~300k 2 299997 251.477860 1192.94 0 0 0 299997
on-1 ~300k 3 299996 250.144401 1199.29 0 0 0 299996
on-1 ~300k 4 299995 250.334114 1198.38 0 0 0 299995
on-1 ~300k 5 299996 249.466272 1202.55 0 0 0 299996
off ~8k 1 7995 8.962985 892.00 0 0 0 7995
off ~8k 2 8000 8.373209 955.43 0 0 0 8000
off ~8k 3 7994 8.488096 941.79 0 0 0 7994
off ~8k 4 7997 8.337431 959.17 0 0 0 7997
off ~8k 5 7999 8.360164 956.80 0 0 0 7999
off ~100k 1 99995 98.427086 1015.93 0 0 0 99995
off ~100k 2 99994 97.591052 1024.62 0 0 0 99994
off ~100k 3 99993 97.569824 1024.84 0 0 0 99993
off ~100k 4 99993 97.524890 1025.31 0 0 0 99993
off ~100k 5 99997 97.531408 1025.28 0 0 0 99997
off ~300k 1 299995 301.324404 995.59 0 0 0 299995
off ~300k 2 299993 303.484607 988.49 0 0 0 299993
off ~300k 3 299990 300.914443 996.93 0 0 0 299990
off ~300k 4 299993 300.941630 996.85 0 0 0 299993
off ~300k 5 299987 300.773746 997.38 0 0 0 299987
on-2 ~8k 1 7995 7.319082 1092.35 0 0 0 7995
on-2 ~8k 2 8000 6.914148 1157.05 0 0 0 8000
on-2 ~8k 3 7997 6.981898 1145.39 0 0 0 7997
on-2 ~8k 4 7999 6.948554 1151.17 0 0 0 7999
on-2 ~8k 5 7998 6.945236 1151.58 0 0 0 7998
on-2 ~100k 1 99995 80.386495 1243.93 0 0 0 99995
on-2 ~100k 2 99995 80.313600 1245.06 0 0 0 99995
on-2 ~100k 3 99991 80.367336 1244.17 0 0 0 99991
on-2 ~100k 4 99999 80.212155 1246.68 0 0 0 99999
on-2 ~100k 5 99995 80.323434 1244.90 0 0 0 99995
on-2 ~300k 1 299995 248.403296 1207.69 0 0 0 299995
on-2 ~300k 2 299993 248.413364 1207.64 0 0 0 299993
on-2 ~300k 3 299997 248.609364 1206.70 0 0 0 299997
on-2 ~300k 4 299998 248.803122 1205.76 0 0 0 299998
on-2 ~300k 5 300000 248.811761 1205.73 0 0 0 300000

All 45 rows returned HTTP 200, finish_reason=stop, response OK, and passed the strict cold gate. Raw JSON receipts are retained as /tmp/pr77-on-1.json, /tmp/pr77-off.json, and /tmp/pr77-on-2.json on the test head.

Conclusion

On this deployment, E2 is engaged on both ranks and produces a repeatable ~20–21% fully uncached prefill gain at 8K–300K with complete distribution separation. The kernel is not silently falling back here. Rollout should remain opt-in until the maintainer deployment runs this same diagnostic image/protocol; a neutral result there with direct_calls == scatter_calls > 0 would establish geometry sensitivity, while zero calls or a fallback receipt would identify integration drift.

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Maintainer kit — E2 at MNBT=7168 (2026-09-01)

EXL3_FAT_KERNEL=1 on the public GHCR :exl3 tag was a no-op. That image is 2026-08-28: exl3.py 27 704 B (no exl3_fat_diag), exllamav3_ext.exl3_fat_gemm absent. Overlay verify only asserted exl3_moe, so boot looked healthy. After BUILD=1 the image has exl3_fat_gemm.sm_121a.cubin, effective_tier=kernel, shared_suh=42/42, sym_fat_gemm=1, batched/sorted/legacy calls 0.

One-shot unique-salt docs/_run_cold_prefill.py (thinking off, temp 0, cached_tokens unset, metrics local_compute == prompt_tokens, cold APC hits 0). ~8k on 3548/7168 is first-request warmup — ignore those tok/s.

Rung MNBT 2048 MNBT 3548 MNBT 7168 C4 keep (2048, no E2)
~8k cold tok/s 688 (11.62 s) 441 warmup 418 warmup 938 / 8.53 s
~8k APC TTFT 1.15 s 1.62 s 1.11 s 1.30 s
~12k 1130 1073 1101 926
~16k 1146 1141 1155 972
~100k 1086 1151 1148 997
~256k 989 1090 1087 973
~300k 1117 1114 1107 941

7168 ≈ 3548 on 100k–300k (≤1%). 2048 loses on 100k/256k. Vs this kit’s C4 keep, 7168 E2 is about +15% at 100k and +18% at 300k. Direct/scatter counters were nonzero on every E2 boot (max_rows matched MNBT; 2048 scratch 130 027 520 B matches the PR receipt).

Follow-up on this branch: default EXL3_FAT_KERNEL=1, MAX_NUM_BATCHED_TOKENS=7168, and rebuild from Dockerfile when the overlay recipe stamp drifts (so a git pull is not still serving the old GHCR extension).

GHCR :exl3 predates exl3_fat_gemm, so EXL3_FAT_KERNEL=1 was a no-op until
BUILD=1. Stamp the image from the overlay recipe and rebuild when git pull
changes it. 7168 was the best E2 one-shot on this kit.

Co-authored-by: Cursor <cursoragent@cursor.com>
@nood-co1

nood-co1 commented Sep 1, 2026

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Independent reproduction on a second 2× DGX Spark deployment — E2 gain confirmed

We independently reproduced this PR's fat-expert tiers on our own 2× DGX Spark GB10 deployment
(TP=2, EXL3 weights, FP8 KV, 1M context, DFlash2 k=7 draft TP=2, MNBT 2048, GLM53_MIXED_PREFILL_CHUNK=skip,
MAX_NUM_SEQS=16, GPU_MEM_UTIL=0.87). Posting the receipts as third-party evidence for the
geometry-sensitivity question the PR leaves open.

Method (mirrors this PR's protocol)

  • Branch under test: perf/exl3-fat-prefill-clean @ f1d1d83, merged onto our deployed checkout
    (main 493cb88 + our cache PRs Sparse prefix-cache snapshot retention knob (GLM53_APC_RETENTION_INTERVAL) #79–Indexer prefill-workspace right-sizing: reclaim ~4.5 GiB for KV (+27% capacity, opt-in) #86 set); byte-identical overlay/exl3.py, .cu/.cuh, patch
    script and tests to the PR head.
  • Image derivation mirrors yours: our published-GHCR production image + compiled pinned exllamav3
    c5d9c65… with patch_exl3_fat_kernel.py (TORCH_CUDA_ARCH_LIST=12.1a; exl3_fat_gemm /
    exl3_fat_gemm_scatter asserted) + the branch exl3.py replacing the baked copy. One image for
    every arm
    ; the off arm = all three flags 0 on that same image.
  • Note for other reproducers: the published GHCR :exl3 image bakes an older exl3.py (778 lines)
    than current main's overlay/exl3.py — the overlay only reaches a deployment via image
    rebuild/derivation, so flag-only experiments on the stock image measure the legacy file.
  • We also hit the _check_dflash2 compact_block = 64 preflight assertion against the GPU-validated
    image and used SKIP_OVERLAY_VERIFY=1, as this PR's matrix runs did; the full GPU self-check suite
    minus that check passed offline on the derived image (fat parity, tier isolation, mixed thin/fat,
    diag counters, CUDA-graph capture).
  • A/B/A boot sequence off-1 → sorted → batched → kernel-1 → off-2 → kernel-2; 5 unique-salt cold
    observations per rung per boot at ~8K/~50K/~100K (+3 at ~300K on the off/kernel boots); one at a
    time, temp 0; throughput = prompt_tokens/TTFT.
  • Cold acceptance per row, fail-closed: prefix_cache_hits_total Δ=0, local_cache_hit Δ=0,
    local_compute Δ == prompt_tokens (our build does not expose usage.prompt_tokens_details, so the
    cached_tokens condition is carried by the metrics deltas — stated). One APC follow-up per boot
    proved the gate detects reuse. All 180 cold rows across the full campaign (tier arms + the MNBT ladder below) passed the gate; 102 belong to the six tier boots.

Results (medians of accepted cold rows per boot)

Arm ~8K ~50K ~100K ~300K
off-1 944.4 1016.5 1020.8 (CV 0.29%) 1000.1
sorted 1019.3 1075.1 1078.6 —
batched 1044.3 1115.0 1118.2 —
kernel-1 1147.4 1233.0 1238.0 (CV 0.23%) 1205.2
off-2 931.9 1016.5 1025.7 1002.1
kernel-2 1145.5 1230.4 1237.5 1204.2

Pooled kernel vs pooled off: +24.5% @8k (median-of-medians +22.2%), +21.6% @50k, +21.0% @100k,
+20.4% @300K
— complete distribution separation at every rung (slowest kernel row faster than the
fastest off row). Off arms agree within 0.5% at the >=50K rungs across the 3-hour window (the 8K rung is noisier: medians 944.4 vs 931.9, 1.3%); kernel arms agree within 0.25% everywhere.

Engagement and safety receipts

  • kernel boots (both ranks, both boots): configured_tier=kernel effective_tier=kernel tier_reason=kernel_ok; direct_calls == scatter_calls (471,511 on kernel-1's ladder);
    fallback_calls batched/sorted/legacy = 0; fat_scratch_peak_bytes = 130027520 — identical to
    this PR's receipt; shared SUH 42/42; SM 12.1; no degraded line.
  • off boots: direct_calls = scatter_calls = 0, legacy fallbacks only.
  • Decode: structured 66–69 (off) vs 64–69 (kernel) tok/s, prose 25–29 vs 27–29 (within noise);
    decode-under-prefill (20K cold arriving during a generation): decode chunk rate 1.93 (off) vs
    2.26 (kernel) chunks/s during the prefill — no regression.
  • Equivalence off-vs-kernel (fixed prompts, temp 0, per-token logprobs, 3-cold-pair noise floor):
    pos-0 tokens identical, max|Δlogprob| over agreeing positions 0.11–0.49 ≤ 3× the cold-vs-cold
    floor; the fixed code prompt decoded bit-identically across the off-1 and kernel-1 boots.

MNBT cross-check (kernel tier; 5 cold reps/rung, 3 at 300K where shown)

Since main just defaulted MAX_NUM_BATCHED_TOKENS=7168 (86f145d, described there as a one-shot), we
ran a repeated MNBT ladder under the kernel tier on our deployment, with a contemporaneous 2048
anchor boot inside the block (anchor within 0.5% of the earlier kernel boots → no drift):

MNBT ~8K med ~50K med ~100K med ~300K med GPU KV cache size (tokens)
1024 1058.5 1164.4 1163.1 — 2,167,539
2048 (3 boots) 1144–1147 1226–1233 1232–1238 1204–1205 1,903,381–1,946,859
3584 1155.1 1235.1 1239.6 — 1,709,956
4096 1156.9 1227.7 1229.1 — 1,635,983
7168 1145.6 (CV 10.4%) 1211.1 1215.2 1182.9 1,351,916

On this deployment, 7168 measured slower than every 2048 boot: −1.2% to −1.8% at 50K
(1211.1 vs 1226–1233), −1.4% to −1.9% at 100K (1215.2 vs 1232–1238), −1.8% at 300K (1182.9 vs
1204–1205), and its KV pool is 29.0% smaller than the contemporaneous 2048 anchor
(1,351,916 vs 1,903,381 tokens; boot-to-boot 2048 pools varied 1.90–1.95M) plus ~432 MB/device fat
scratch (vs 130 MB at 2048). 3584 was nominally best at 100K (+0.6% over the anchor, below our
pre-declared 3% decision threshold) at a 10.2%-smaller pool; we kept 2048. Important caveat:
our deployment runs MAX_NUM_SEQS=16 (yours 4) and the rightsized indexer workspace, and MNBT
interacts with workspace/graph sizing — so we read this as MNBT being deployment-dependent rather
than a refutation of the 7168 number on the maintainer kit. A repeated A/B on the maintainer kit
(and a KV-pool line in the comparison) may be worth it before 7168 hardens as the recommended
default; happy to share our harness.

Conclusion

On this second, independently operated 2× DGX Spark deployment, E2 is engaged on both ranks and
reproduces as a flat ~+20–21% fully uncached prefill gain at 50K–300K (larger at 8K), with decode
unchanged — matching this PR's promotion-sequence receipts closely (per-boot medians at the 100K/300K rungs land within ~1% of yours; short-rung absolutes differ more). A second deployment reproducing the gain
narrows the geometry-sensitivity question, though our experiment does not isolate geometry from
image/integration differences on the earlier non-reproducing deployment. One reproducibility note
that may be relevant to it: flag-only experiments on the published GHCR image exercise the old baked
exl3.py (see the stale-image note above), so a kernel-tier A/B there needs a rebuilt/derived image.

Raw per-row JSONL, boot logs, diag lines and the derivation script are archived on our side and can
be shared on request.


Submitted by nood-co1 on behalf of Blockbrain Labs (https://x.com/blockbrain_labs, GitHub org blockbrain-ai). Measured on our 2× NVIDIA DGX Spark deployment.

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