Bug97: Changes to build newlib for NanoMIPS with LLVM/Clang

LLVM integrated assembler does not support assembler relaxations. It chooses 16-bit conditional branches and relies on linker relaxation to transform them in to the correct instruction. Handwritten assembly must be compiled with linker relaxation and PC-relative addressing explicitly enabled to match C compilation. Change-Id: I751e9d04726d437714723e466e305ff1a8f2cc4a
MediaTek-Labs · Apr 3, 2024 · 2a4a94c · 2a4a94c
1 parent cdfc026
commit 2a4a94c
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diff --git a/newlib/libc/machine/mips/setjmp.S b/newlib/libc/machine/mips/setjmp.S
@@ -133,6 +133,11 @@
 #define GPOFF(INDEX) (INDEX * BYTES_PER_WORD)
 #define FPOFF(INDEX) ((INDEX + NUM_GPRS_SAVED) * BYTES_PER_WORD)
 
+#ifdef __nanomips__
+	.linkrelax
+	.module pcrel
+#endif
+
 /* int setjmp (jmp_buf);  */
 	.globl	setjmp
 	.ent	setjmp

diff --git a/newlib/libc/machine/mips/strcmp.S b/newlib/libc/machine/mips/strcmp.S
@@ -77,6 +77,8 @@
 
 #ifdef __nanomips__
 # define _FUNCTION_SECTIONS_
+	.linkrelax
+	.module pcrel
 #endif
 
 #ifdef ANDROID_CHANGES