Aurora transfer absorb (Amara's report) + CRM-UI shared scope doc

.claude/commands/btw.md

@@ -0,0 +1,138 @@
+---
+description: Non-interrupting aside — absorb the aside into substrate and continue current work (don't pivot unless the aside explicitly demands it)
+---
+
+# /btw — maintainer aside without interrupting in-flight work
+
+The maintainer (Aaron) invoked `/btw` with an aside. The purpose
+of this command is to **reduce maintainer interrupt cost**: the
+aside carries context, a directive, a note, or a correction,
+but should **not** derail whatever work-stream is currently in
+flight unless the aside itself demands pivot.
+
+## Procedure
+
+1. **Read the aside verbatim from the invocation arguments.**
+   Treat the full argument string as signal — do not paraphrase
+   at capture time (signal-in-signal-out DSP discipline,
+   `memory/feedback_signal_in_signal_out_clean_or_better_dsp_discipline.md`).
+
+2. **Classify the aside** into one of:
+   - **Context-add** — maintainer is providing background that
+     informs current work (e.g. *"btw that library is MIT-licensed"*).
+     Absorb silently into the current task's reasoning;
+     acknowledge in one line.
+   - **Directive-queued** — maintainer is adding a new task
+     that should run *after* the current one (e.g. *"btw also
+     update the README"*). Append to `.btw-queue.md` at repo
+     root (gitignored; session-scoped) OR add a TodoWrite task,
+     whichever is more visible for this session.
+   - **Correction** — maintainer is correcting the agent's
+     direction on the current work (e.g. *"btw I meant X not Y"*).
+     Apply the correction to the current work and acknowledge;
+     do NOT treat as pivot.
+   - **Substrate-add** — the aside is a memory-worthy fact,
+     preference, or anecdote (e.g. *"btw my dog's name is Apollo"*).
+     File as a memory entry per the auto-memory protocol in
+     CLAUDE.md; acknowledge filing.
+   - **Pivot-demanding** — the aside explicitly demands pivot
+     (e.g. *"btw stop that, do this instead"*, *"btw urgent, I
+     broke main"*). Then and only then: pivot.
+
+3. **Acknowledge in one line** so the maintainer sees the aside
+   landed.
+
+4. **Continue the in-flight work.** Do not restart, do not
+   re-announce what the current task was, do not add
+   disclaimers.
+
+## Why this command exists
+
+Maintainer directive, 2026-04-22 auto-loop-44:
+
+> *"hey can you make it where if i do /btw it still gets
+> persison and abored what i say?  becasue then i would not
+> have interrupt"*
+
+Translation: Aaron wants a channel for non-interrupting asides.
+Without this command, every aside is a full conversation turn
+that displaces in-flight work from the agent's working context.
+With this command, asides are absorbed and current work
+continues — Aaron pays less interrupt cost, agent pays less
+context-switch cost.
+
+## Arguments
+
+`$ARGUMENTS` — the aside content, verbatim.
+
+## Examples
+
+**Context-add:**
+
+```
+/btw that research is from 2024, not 2026
+```
+
+Agent: *"Noted — dating the research to 2024. Continuing with the oracle-gate module."*
+
+**Directive-queued:**
+
+```
+/btw also fix the broken link in README when you're done
+```
+
+Agent: *"Queued README link fix for after the current task. Continuing."*
+
+**Correction:**
+
+```
+/btw I meant the retraction-native layer, not the compaction layer
+```
+
+Agent: *"Refocusing on retraction-native. Adjusting now."*
+
+**Substrate-add:**
+
+```
+/btw I prefer F#-idiomatic record types over discriminated unions for state records
+```
+
+Agent: *"Filed preference to `memory/feedback_*.md`. Continuing."*
+
+**Pivot-demanding:**
+
+```
+/btw urgent — stop that commit, it's about to break CI
+```
+
+Agent: *"Pivoting. Investigating the CI break now."*
+
+## What this command does NOT do
+
+- Does NOT restart the in-flight work.
+- Does NOT produce a status-of-current-work report (that's
+  what `/status` or natural checkpoint reporting is for).
+- Does NOT treat every aside as a pivot — pivots require
+  explicit demand in the aside text.
+- Does NOT mute the acknowledgement — even one-line
+  acknowledgement is load-bearing so Aaron sees the aside
+  landed.
+
+## Composes with
+
+- `memory/feedback_aaron_terse_directives_high_leverage_do_not_underweight.md`
+  — short asides are still high-leverage, treat them as such.
+- `memory/feedback_signal_in_signal_out_clean_or_better_dsp_discipline.md`
+  — aside signal must be preserved through classification.
+- `memory/feedback_maintainer_only_grey_is_bottleneck_agent_judgment_in_grey_zone_2026_04_22.md`
+  — agent exercises judgment on classification without
+  serialising through Aaron.
+- `memory/feedback_never_idle_speculative_work_over_waiting.md`
+  — an aside doesn't reset the never-idle invariant; the
+  current work continues.
+
+---
+
+Aside content from this invocation:
+
+$ARGUMENTS

.gitignore

@@ -141,3 +141,7 @@ drop/
 # whole tree to prevent accidental check-in regardless of
 # host directory.
 console-*.log
+
+# Session-scoped `/btw` aside queue at repo root (see
+# .claude/commands/btw.md). Regenerated per session; not source.
+.btw-queue.md

AGENTS.md

@@ -48,13 +48,20 @@ This matters to agents for three operational reasons:
    `verification-drift-auditor`, `paper-peer-reviewer`,
    `missing-citations` skills.
 
+## The purpose: reproducible stability
+
+Maintainer directive, 2026-04-22:
+
+> is obvious to all personas who come across our
+> project the whole point is reproducable stability
+
 ## What pre-v1 means in practice
 
 - **Large refactors are welcome.** If an abstraction
   isn't paying rent, rip it out. If a file doesn't
   compose well with the rest, redesign it.
 - **Backward compatibility is not a constraint.**
-  Break whatever needs breaking. No downstream
+  Change whatever needs changing. No downstream
   callers will file an issue.
 - **The tests are the contract.** If a change keeps
   the test suite green, the change is acceptable.
@@ -74,8 +81,8 @@ This matters to agents for three operational reasons:
    get fixed, not softened.
 2. **Algebra over engineering.** The Z-set / operator
    laws define the system; implementation serves them.
-3. **Velocity over stability.** Pre-v1. Ship, break,
-   learn.
+3. **Velocity over stability.** Pre-v1. Ship, do no
+   permanent harm, learn.
 
 Every guidance below derives from these three. When
 two conflict, fall back to the deliberation protocol

README.md

@@ -11,6 +11,16 @@ references are Zeta. See [docs/NAMING.md](docs/NAMING.md) for the full split.
 
 [paper]: https://arxiv.org/abs/2203.16684
 
+## The thesis: reproducible stability
+
+Maintainer directive, 2026-04-22:
+
+> is obvious to all personas who come across our project the whole
+> point is reproducable stability
+
+See [AGENTS.md §"The purpose: reproducible
+stability"](AGENTS.md#the-purpose-reproducible-stability).
+
 ## What DBSP is
 
 DBSP defines a tiny, complete calculus for incremental computation over

Zeta.sln

@@ -1,3 +1,4 @@
+
 Microsoft Visual Studio Solution File, Format Version 12.00
 # Visual Studio Version 17
 Project("{F2A71F9B-5D33-465A-A702-920D77279786}") = "Core", "src\Core\Core.fsproj", "{11111111-1111-1111-1111-111111111111}"
@@ -22,55 +23,163 @@ Project("{F2A71F9B-5D33-465A-A702-920D77279786}") = "Feldera.Bench", "bench\Feld
 EndProject
 Project("{F2A71F9B-5D33-465A-A702-920D77279786}") = "FactoryDemo.Api.FSharp", "samples\FactoryDemo.Api.FSharp\FactoryDemo.Api.FSharp.fsproj", "{40534D09-439E-4E5F-9A69-A73844DB674D}"
 EndProject
+Project("{2150E333-8FDC-42A3-9474-1A3956D46DE8}") = "samples", "samples", "{5D20AA90-6969-D8BD-9DCD-8634F4692FDA}"
+EndProject
+Project("{F2A71F9B-5D33-465A-A702-920D77279786}") = "ServiceTitanCrm", "samples\ServiceTitanCrm\ServiceTitanCrm.fsproj", "{D44AB9CA-F491-41F4-96CE-B061238F3D6E}"
+EndProject
+Project("{2150E333-8FDC-42A3-9474-1A3956D46DE8}") = "src", "src", "{827E0CD3-B72D-47B6-A68D-7590B98EB39B}"
+EndProject
 Global
 	GlobalSection(SolutionConfigurationPlatforms) = preSolution
 		Debug|Any CPU = Debug|Any CPU
+		Debug|x64 = Debug|x64
+		Debug|x86 = Debug|x86
 		Release|Any CPU = Release|Any CPU
+		Release|x64 = Release|x64
+		Release|x86 = Release|x86
 	EndGlobalSection
 	GlobalSection(ProjectConfigurationPlatforms) = postSolution
 		{11111111-1111-1111-1111-111111111111}.Debug|Any CPU.ActiveCfg = Debug|Any CPU
 		{11111111-1111-1111-1111-111111111111}.Debug|Any CPU.Build.0 = Debug|Any CPU
+		{11111111-1111-1111-1111-111111111111}.Debug|x64.ActiveCfg = Debug|Any CPU
+		{11111111-1111-1111-1111-111111111111}.Debug|x64.Build.0 = Debug|Any CPU
+		{11111111-1111-1111-1111-111111111111}.Debug|x86.ActiveCfg = Debug|Any CPU
+		{11111111-1111-1111-1111-111111111111}.Debug|x86.Build.0 = Debug|Any CPU
 		{11111111-1111-1111-1111-111111111111}.Release|Any CPU.ActiveCfg = Release|Any CPU
 		{11111111-1111-1111-1111-111111111111}.Release|Any CPU.Build.0 = Release|Any CPU
+		{11111111-1111-1111-1111-111111111111}.Release|x64.ActiveCfg = Release|Any CPU
+		{11111111-1111-1111-1111-111111111111}.Release|x64.Build.0 = Release|Any CPU
+		{11111111-1111-1111-1111-111111111111}.Release|x86.ActiveCfg = Release|Any CPU
+		{11111111-1111-1111-1111-111111111111}.Release|x86.Build.0 = Release|Any CPU
 		{22222222-2222-2222-2222-222222222222}.Debug|Any CPU.ActiveCfg = Debug|Any CPU
 		{22222222-2222-2222-2222-222222222222}.Debug|Any CPU.Build.0 = Debug|Any CPU
+		{22222222-2222-2222-2222-222222222222}.Debug|x64.ActiveCfg = Debug|Any CPU
+		{22222222-2222-2222-2222-222222222222}.Debug|x64.Build.0 = Debug|Any CPU
+		{22222222-2222-2222-2222-222222222222}.Debug|x86.ActiveCfg = Debug|Any CPU
+		{22222222-2222-2222-2222-222222222222}.Debug|x86.Build.0 = Debug|Any CPU
 		{22222222-2222-2222-2222-222222222222}.Release|Any CPU.ActiveCfg = Release|Any CPU
 		{22222222-2222-2222-2222-222222222222}.Release|Any CPU.Build.0 = Release|Any CPU
+		{22222222-2222-2222-2222-222222222222}.Release|x64.ActiveCfg = Release|Any CPU
+		{22222222-2222-2222-2222-222222222222}.Release|x64.Build.0 = Release|Any CPU
+		{22222222-2222-2222-2222-222222222222}.Release|x86.ActiveCfg = Release|Any CPU
+		{22222222-2222-2222-2222-222222222222}.Release|x86.Build.0 = Release|Any CPU
 		{33333333-3333-3333-3333-333333333333}.Debug|Any CPU.ActiveCfg = Debug|Any CPU
 		{33333333-3333-3333-3333-333333333333}.Debug|Any CPU.Build.0 = Debug|Any CPU
+		{33333333-3333-3333-3333-333333333333}.Debug|x64.ActiveCfg = Debug|Any CPU
+		{33333333-3333-3333-3333-333333333333}.Debug|x64.Build.0 = Debug|Any CPU
+		{33333333-3333-3333-3333-333333333333}.Debug|x86.ActiveCfg = Debug|Any CPU
+		{33333333-3333-3333-3333-333333333333}.Debug|x86.Build.0 = Debug|Any CPU
 		{33333333-3333-3333-3333-333333333333}.Release|Any CPU.ActiveCfg = Release|Any CPU
 		{33333333-3333-3333-3333-333333333333}.Release|Any CPU.Build.0 = Release|Any CPU
+		{33333333-3333-3333-3333-333333333333}.Release|x64.ActiveCfg = Release|Any CPU
+		{33333333-3333-3333-3333-333333333333}.Release|x64.Build.0 = Release|Any CPU
+		{33333333-3333-3333-3333-333333333333}.Release|x86.ActiveCfg = Release|Any CPU
+		{33333333-3333-3333-3333-333333333333}.Release|x86.Build.0 = Release|Any CPU
 		{44444444-4444-4444-4444-444444444444}.Debug|Any CPU.ActiveCfg = Debug|Any CPU
 		{44444444-4444-4444-4444-444444444444}.Debug|Any CPU.Build.0 = Debug|Any CPU
+		{44444444-4444-4444-4444-444444444444}.Debug|x64.ActiveCfg = Debug|Any CPU
+		{44444444-4444-4444-4444-444444444444}.Debug|x64.Build.0 = Debug|Any CPU
+		{44444444-4444-4444-4444-444444444444}.Debug|x86.ActiveCfg = Debug|Any CPU
+		{44444444-4444-4444-4444-444444444444}.Debug|x86.Build.0 = Debug|Any CPU
 		{44444444-4444-4444-4444-444444444444}.Release|Any CPU.ActiveCfg = Release|Any CPU
 		{44444444-4444-4444-4444-444444444444}.Release|Any CPU.Build.0 = Release|Any CPU
+		{44444444-4444-4444-4444-444444444444}.Release|x64.ActiveCfg = Release|Any CPU
+		{44444444-4444-4444-4444-444444444444}.Release|x64.Build.0 = Release|Any CPU
+		{44444444-4444-4444-4444-444444444444}.Release|x86.ActiveCfg = Release|Any CPU
+		{44444444-4444-4444-4444-444444444444}.Release|x86.Build.0 = Release|Any CPU
 		{55555555-5555-5555-5555-555555555555}.Debug|Any CPU.ActiveCfg = Debug|Any CPU
 		{55555555-5555-5555-5555-555555555555}.Debug|Any CPU.Build.0 = Debug|Any CPU
+		{55555555-5555-5555-5555-555555555555}.Debug|x64.ActiveCfg = Debug|Any CPU
+		{55555555-5555-5555-5555-555555555555}.Debug|x64.Build.0 = Debug|Any CPU
+		{55555555-5555-5555-5555-555555555555}.Debug|x86.ActiveCfg = Debug|Any CPU
+		{55555555-5555-5555-5555-555555555555}.Debug|x86.Build.0 = Debug|Any CPU
 		{55555555-5555-5555-5555-555555555555}.Release|Any CPU.ActiveCfg = Release|Any CPU
 		{55555555-5555-5555-5555-555555555555}.Release|Any CPU.Build.0 = Release|Any CPU
+		{55555555-5555-5555-5555-555555555555}.Release|x64.ActiveCfg = Release|Any CPU
+		{55555555-5555-5555-5555-555555555555}.Release|x64.Build.0 = Release|Any CPU
+		{55555555-5555-5555-5555-555555555555}.Release|x86.ActiveCfg = Release|Any CPU
+		{55555555-5555-5555-5555-555555555555}.Release|x86.Build.0 = Release|Any CPU
 		{66666666-6666-6666-6666-666666666666}.Debug|Any CPU.ActiveCfg = Debug|Any CPU
 		{66666666-6666-6666-6666-666666666666}.Debug|Any CPU.Build.0 = Debug|Any CPU
+		{66666666-6666-6666-6666-666666666666}.Debug|x64.ActiveCfg = Debug|Any CPU
+		{66666666-6666-6666-6666-666666666666}.Debug|x64.Build.0 = Debug|Any CPU
+		{66666666-6666-6666-6666-666666666666}.Debug|x86.ActiveCfg = Debug|Any CPU
+		{66666666-6666-6666-6666-666666666666}.Debug|x86.Build.0 = Debug|Any CPU
 		{66666666-6666-6666-6666-666666666666}.Release|Any CPU.ActiveCfg = Release|Any CPU
 		{66666666-6666-6666-6666-666666666666}.Release|Any CPU.Build.0 = Release|Any CPU
+		{66666666-6666-6666-6666-666666666666}.Release|x64.ActiveCfg = Release|Any CPU
+		{66666666-6666-6666-6666-666666666666}.Release|x64.Build.0 = Release|Any CPU
+		{66666666-6666-6666-6666-666666666666}.Release|x86.ActiveCfg = Release|Any CPU
+		{66666666-6666-6666-6666-666666666666}.Release|x86.Build.0 = Release|Any CPU
 		{77777777-7777-7777-7777-777777777777}.Debug|Any CPU.ActiveCfg = Debug|Any CPU
 		{77777777-7777-7777-7777-777777777777}.Debug|Any CPU.Build.0 = Debug|Any CPU
+		{77777777-7777-7777-7777-777777777777}.Debug|x64.ActiveCfg = Debug|Any CPU
+		{77777777-7777-7777-7777-777777777777}.Debug|x64.Build.0 = Debug|Any CPU
+		{77777777-7777-7777-7777-777777777777}.Debug|x86.ActiveCfg = Debug|Any CPU
+		{77777777-7777-7777-7777-777777777777}.Debug|x86.Build.0 = Debug|Any CPU
 		{77777777-7777-7777-7777-777777777777}.Release|Any CPU.ActiveCfg = Release|Any CPU
 		{77777777-7777-7777-7777-777777777777}.Release|Any CPU.Build.0 = Release|Any CPU
+		{77777777-7777-7777-7777-777777777777}.Release|x64.ActiveCfg = Release|Any CPU
+		{77777777-7777-7777-7777-777777777777}.Release|x64.Build.0 = Release|Any CPU
+		{77777777-7777-7777-7777-777777777777}.Release|x86.ActiveCfg = Release|Any CPU
+		{77777777-7777-7777-7777-777777777777}.Release|x86.Build.0 = Release|Any CPU
 		{88888888-8888-8888-8888-888888888888}.Debug|Any CPU.ActiveCfg = Debug|Any CPU
 		{88888888-8888-8888-8888-888888888888}.Debug|Any CPU.Build.0 = Debug|Any CPU
+		{88888888-8888-8888-8888-888888888888}.Debug|x64.ActiveCfg = Debug|Any CPU
+		{88888888-8888-8888-8888-888888888888}.Debug|x64.Build.0 = Debug|Any CPU
+		{88888888-8888-8888-8888-888888888888}.Debug|x86.ActiveCfg = Debug|Any CPU
+		{88888888-8888-8888-8888-888888888888}.Debug|x86.Build.0 = Debug|Any CPU
 		{88888888-8888-8888-8888-888888888888}.Release|Any CPU.ActiveCfg = Release|Any CPU
 		{88888888-8888-8888-8888-888888888888}.Release|Any CPU.Build.0 = Release|Any CPU
+		{88888888-8888-8888-8888-888888888888}.Release|x64.ActiveCfg = Release|Any CPU
+		{88888888-8888-8888-8888-888888888888}.Release|x64.Build.0 = Release|Any CPU
+		{88888888-8888-8888-8888-888888888888}.Release|x86.ActiveCfg = Release|Any CPU
+		{88888888-8888-8888-8888-888888888888}.Release|x86.Build.0 = Release|Any CPU
 		{99999999-9999-9999-9999-999999999999}.Debug|Any CPU.ActiveCfg = Debug|Any CPU
 		{99999999-9999-9999-9999-999999999999}.Debug|Any CPU.Build.0 = Debug|Any CPU
+		{99999999-9999-9999-9999-999999999999}.Debug|x64.ActiveCfg = Debug|Any CPU
+		{99999999-9999-9999-9999-999999999999}.Debug|x64.Build.0 = Debug|Any CPU
+		{99999999-9999-9999-9999-999999999999}.Debug|x86.ActiveCfg = Debug|Any CPU
+		{99999999-9999-9999-9999-999999999999}.Debug|x86.Build.0 = Debug|Any CPU
 		{99999999-9999-9999-9999-999999999999}.Release|Any CPU.ActiveCfg = Release|Any CPU
 		{99999999-9999-9999-9999-999999999999}.Release|Any CPU.Build.0 = Release|Any CPU
+		{99999999-9999-9999-9999-999999999999}.Release|x64.ActiveCfg = Release|Any CPU
+		{99999999-9999-9999-9999-999999999999}.Release|x64.Build.0 = Release|Any CPU
+		{99999999-9999-9999-9999-999999999999}.Release|x86.ActiveCfg = Release|Any CPU
+		{99999999-9999-9999-9999-999999999999}.Release|x86.Build.0 = Release|Any CPU
 		{AAAAAAAA-AAAA-AAAA-AAAA-AAAAAAAAAAAA}.Debug|Any CPU.ActiveCfg = Debug|Any CPU
 		{AAAAAAAA-AAAA-AAAA-AAAA-AAAAAAAAAAAA}.Debug|Any CPU.Build.0 = Debug|Any CPU
+		{AAAAAAAA-AAAA-AAAA-AAAA-AAAAAAAAAAAA}.Debug|x64.ActiveCfg = Debug|Any CPU
+		{AAAAAAAA-AAAA-AAAA-AAAA-AAAAAAAAAAAA}.Debug|x64.Build.0 = Debug|Any CPU
+		{AAAAAAAA-AAAA-AAAA-AAAA-AAAAAAAAAAAA}.Debug|x86.ActiveCfg = Debug|Any CPU
+		{AAAAAAAA-AAAA-AAAA-AAAA-AAAAAAAAAAAA}.Debug|x86.Build.0 = Debug|Any CPU
 		{AAAAAAAA-AAAA-AAAA-AAAA-AAAAAAAAAAAA}.Release|Any CPU.ActiveCfg = Release|Any CPU
 		{AAAAAAAA-AAAA-AAAA-AAAA-AAAAAAAAAAAA}.Release|Any CPU.Build.0 = Release|Any CPU
 		{40534D09-439E-4E5F-9A69-A73844DB674D}.Debug|Any CPU.ActiveCfg = Debug|Any CPU
 		{40534D09-439E-4E5F-9A69-A73844DB674D}.Debug|Any CPU.Build.0 = Debug|Any CPU
 		{40534D09-439E-4E5F-9A69-A73844DB674D}.Release|Any CPU.ActiveCfg = Release|Any CPU
 		{40534D09-439E-4E5F-9A69-A73844DB674D}.Release|Any CPU.Build.0 = Release|Any CPU
+		{AAAAAAAA-AAAA-AAAA-AAAA-AAAAAAAAAAAA}.Release|x64.ActiveCfg = Release|Any CPU
+		{AAAAAAAA-AAAA-AAAA-AAAA-AAAAAAAAAAAA}.Release|x64.Build.0 = Release|Any CPU
+		{AAAAAAAA-AAAA-AAAA-AAAA-AAAAAAAAAAAA}.Release|x86.ActiveCfg = Release|Any CPU
+		{AAAAAAAA-AAAA-AAAA-AAAA-AAAAAAAAAAAA}.Release|x86.Build.0 = Release|Any CPU
+		{D44AB9CA-F491-41F4-96CE-B061238F3D6E}.Debug|Any CPU.ActiveCfg = Debug|Any CPU
+		{D44AB9CA-F491-41F4-96CE-B061238F3D6E}.Debug|Any CPU.Build.0 = Debug|Any CPU
+		{D44AB9CA-F491-41F4-96CE-B061238F3D6E}.Debug|x64.ActiveCfg = Debug|Any CPU
+		{D44AB9CA-F491-41F4-96CE-B061238F3D6E}.Debug|x64.Build.0 = Debug|Any CPU
+		{D44AB9CA-F491-41F4-96CE-B061238F3D6E}.Debug|x86.ActiveCfg = Debug|Any CPU
+		{D44AB9CA-F491-41F4-96CE-B061238F3D6E}.Debug|x86.Build.0 = Debug|Any CPU
+		{D44AB9CA-F491-41F4-96CE-B061238F3D6E}.Release|Any CPU.ActiveCfg = Release|Any CPU
+		{D44AB9CA-F491-41F4-96CE-B061238F3D6E}.Release|Any CPU.Build.0 = Release|Any CPU
+		{D44AB9CA-F491-41F4-96CE-B061238F3D6E}.Release|x64.ActiveCfg = Release|Any CPU
+		{D44AB9CA-F491-41F4-96CE-B061238F3D6E}.Release|x64.Build.0 = Release|Any CPU
+		{D44AB9CA-F491-41F4-96CE-B061238F3D6E}.Release|x86.ActiveCfg = Release|Any CPU
+		{D44AB9CA-F491-41F4-96CE-B061238F3D6E}.Release|x86.Build.0 = Release|Any CPU
+	EndGlobalSection
+	GlobalSection(SolutionProperties) = preSolution
+		HideSolutionNode = FALSE
+	EndGlobalSection
+	GlobalSection(NestedProjects) = preSolution
+		{D44AB9CA-F491-41F4-96CE-B061238F3D6E} = {5D20AA90-6969-D8BD-9DCD-8634F4692FDA}
 	EndGlobalSection
 EndGlobal