get_cpu_name

JuliaSIMD · Nov 14, 2022 · 693f6fc · 693f6fc · chriselrod · Nov 14, 2022
1 parent 6da3643
commit 693f6fc
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Showing 3 changed files with 4 additions and 4 deletions.
diff --git a/Project.toml b/Project.toml
@@ -1,7 +1,7 @@
 name = "LoopVectorization"
 uuid = "bdcacae8-1622-11e9-2a5c-532679323890"
 authors = ["Chris Elrod <[email protected]>"]
-version = "0.12.138"
+version = "0.12.139"
 
 [deps]
 ArrayInterface = "4fba245c-0d91-5ea0-9b3e-6abc04ee57a9"
@@ -39,7 +39,7 @@ ChainRulesCore = "1"
 CloseOpenIntervals = "0.1.10"
 DocStringExtensions = "0.8, 0.9"
 ForwardDiff = "0.9, 0.10"
-HostCPUFeatures = "0.1.3"
+HostCPUFeatures = "0.1.10"
 IfElse = "0.1"
 LayoutPointers = "0.1.11"
 OffsetArrays = "1.4.1"

diff --git a/src/LoopVectorization.jl b/src/LoopVectorization.jl
@@ -105,7 +105,7 @@ using VectorizationBase:
   maybestaticsize#,zero_mask
 
 using HostCPUFeatures:
-  pick_vector_width, register_size, register_count, has_opmask_registers, unwrap
+  pick_vector_width, register_size, register_count, has_opmask_registers, unwrap, get_cpu_name
 using CPUSummary: num_threads, num_cores, cache_linesize, cache_size
 
 

diff --git a/src/codegen/lowering.jl b/src/codegen/lowering.jl
@@ -1039,7 +1039,7 @@ function calc_Ureduct!(ls::LoopSet, us::UnrollSpecification)
         # rem = length(u₁loop) - 
         # max(1, cld(rem, u₁))
       else
-        Core.ifelse(Sys.CPU_NAME === "znver1", 1, Core.ifelse(u₁ ≥ 4, 2, 1))
+        Core.ifelse(get_cpu_name() === "znver1", 1, Core.ifelse(u₁ ≥ 4, 2, 1))
       end
     else
       -1