implement Aarch64 UMOV instruction semantics

[psi-func]

add more VAS types to correctly handle different cases which part of vector register should move to GPR register
add umov semantics in aarch64
instruction reference here

[psi-func]

Capstone v4.0.1 missing important feature with parsing extended VAS types
build fails in CI

[gulldan]

also need it ASAP

[JonathanSalwan]

Lol, I think this is the first ever MR that involves so many reactions ^^.

• Regarding Capstone 5: As 5.0.1 is now tagged as release, I think we can drop support for 4.x.
• Regarding unit tests. Indeed, it could be great to add some in https://github.com/JonathanSalwan/Triton/blob/master/src/testers/aarch64/unicorn_test_aarch64.py

[psi-func]

Found problem in this code via bug in capstone
Tryed to add tests in python
"\x43\x3c\x1c\x0e", "umov w3, v2.S[3]"
Parsed by capstone as MOV instruction, because of this buildSemantics is performed incorrectly
Left issue here
They advise using the next branch