perf(rocm): use Kimi-K3 B1 gate projection

[JohnQinAMD]

Summary

Route the AMD Kimi-K3 router projection through the narrow AITER gfx950 kernel
while preserving GateLinear behavior for explicit AITER opt-out, older AITER
builds, unsupported shapes, and every non-AMD model path.

This PR depends on JohnQinAMD/aiter-amd#6.

Design

• Keep the specialization in an AMD Kimi-K3 GateLinear subclass.
• Wrap dispatch in a compile-safe custom op with a matching fake-tensor
  implementation.
• Use one AITER capability predicate for the exact B1/gfx950 shape.
• Preserve BF16 projection semantics and FP32 router logits in the fallback.

No generic router tier, NVIDIA model, model-name condition, or routing/sort
policy is changed.

Performance

On MI355X/gfx950, the fixed 1x7168 @ 896x7168.T projection improves from
13.69 to 4.21 us (3.13x). The complete route boundary improves 1.55x. In the
accepted TP8 B1 stack, this change advances decode from 50.063 to 50.635
tok/s/GPU (+1.1%).

Correctness and validation

• Focused tests cover exact output versus GateLinear, fake/custom-op schema,
  AITER delegation, and explicit opt-out fallback.
• The kernel uses FP32 accumulation, BF16 rounding, and FP32 materialized
  logits; AITER perf(rocm): fuse Kimi-K3 MLA output gate #6 carries the fixed-shape numerical tests.
• Current-main changed-file pre-commit passes, including Ruff, format, Python
  3.10 mypy, SPDX, import guards, configuration checks, and the CUDA API guard.
• git diff --check passes.
• Later accepted TP8 stacks retaining this gate passed the campaign GSM8K
  accuracy gates; no isolated model-level accuracy delta is attributed to this
  dispatch-only PR.

Disclosure

Developed with assistance from OpenAI Codex. The author reviewed the custom-op
contract, fallback semantics, tests, and performance evidence.

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