ENH: Update CircleCI yaml file#21
Merged
kwrobot merged 1 commit intoInsightSoftwareConsortium:masterfrom Mar 20, 2017
Merged
Conversation
Member
Author
|
Pushed to github to test the yaml. |
619fcc8 to
8676694
Compare
Member
Author
|
The build build timed out. I presume it was an issue with the MAKEFLAGS env not propagating correctly... |
Tell CircleCI to ignore the dashboard and hooks branch. Use standard CTEST_BUILD_FLAGS ctest variable over custom MAKEJ environment variable. Use less verbose wget bar over dot progress reporting. Limit number of threads for testing. Change-Id: I9d840fdd063f0ff6e2ce3f5bc73fdf8c38820ab9
8676694 to
4366c91
Compare
Member
Author
|
I am not treating CTEST_BUILD_FLAGS like the rest of the env->ctest variable. I expect this will still time out because it is dependent on the update to the dashboard branch too. |
hjmjohnson
added a commit
to hjmjohnson/ITK
that referenced
this pull request
Feb 15, 2020
Update from 3.3.4 (circa 2014) to 3.3.8 (circa 2018)
to include performance updates and improved compiler
compatibility.
FFTW 3.3.8 May 28th, 2018
Fixed AVX, AVX2 for gcc-8.
By default, FFTW 3.3.7 was broken with gcc-8. AVX and AVX2 code
assumed that the compiler honors the distinction between +0 and -0,
but gcc-8 -ffast-math does not. The default CFLAGS included
-ffast-math . This release ensures that FFTW works with gcc-8
-ffast-math , and removes -ffast-math from the default CFLAGS for good
measure.
FFTW 3.3.7 Oct 29th, 2017
Experimental support for CMake
The primary build mechanism for FFTW remains GNU autoconf/automake.
CMake support is meant to offer an easy way to compile FFTW on
Windows, and as such it does not cover all the features of the
automake build system, such as exotic cycle counters, cross-compiling,
or build of binaries for a mixture of ISA's (e.g., amd64 vs amd64+avx
vs amd64+avx2). Patches are welcome.
Fixes for armv7a cycle counter.
Official support for aarch64, now that we have hardware to test it.
Tweak usage of FMA instructions in a way that favors newer processors (Skylake and Ryzen) over older processors (Haswell).
tests/bench: use 64-bit precision to compute mflops.
FFTW 3.3.6-pl2 Mar 25th, 2017
Bugfix: MPI Fortran-03 headers were missing in FFTW 3.3.6-pl1.
FFTW 3.3.6-pl1 (withdrawn) Jan 16th, 2017
Bugfix: FFTW 3.3.6 had the wrong libtool version number, and generated shared libraries of the form libfftw3.so.2.6.6 instead of libfftw3.so.3.*.
FFTW 3.3.6 (withdrawn) Jan 15th, 2017
The fftw_make_planner_thread_safe() API introduced in 3.3.5 didn't work, and this 3.3.6 fixes it. Sorry about that.
Compilation fixes for IBM XLC.
Compilation fixes for threads on Windows.
fix SIMD autodetection on amd64 when (_MSC_VER > 1500)
FFTW 3.3.5 Jul 31, 2016
New SIMD support:
Power8 VSX instructions in single and double precision. To use, add --enable-vsx to configure.
Support for AVX2 (256-bit FMA instructions). To use, add --enable-avx2 to configure.
Experimental support for AVX512 and KCVI. (--enable-avx512, --enable-kcvi) This code is expected to work but the FFTW maintainers do not have hardware to test it.
Support for AVX128/FMA (for some AMD machines) (--enable-avx128-fma)
Double precision Neon SIMD for aarch64. This code is expected to work but the FFTW maintainers do not have hardware to test it.
generic SIMD support using gcc vector intrinsics.
Add fftw_make_planner_thread_safe() API.
fix InsightSoftwareConsortium#18 (disable float128 for CUDACC).
fix InsightSoftwareConsortium#19: missing Fortran interface for fftwq_alloc_real.
fix InsightSoftwareConsortium#21 (don't use float128 on Portland compilers, which pretend to be gcc).
fix: Avoid segfaults due to double free in MPI transpose.
Special note for distribution maintainers: Although FFTW supports a
zillion SIMD instruction sets, enabling them all at the same time is a
bad idea, because it increases the planning time for minimal gain. We
recommend that general-purpose x86 distributions only enable SSE2 and
perhaps AVX. Users who care about the last ounce of performance should
recompile FFTW themselves.
hjmjohnson
added a commit
that referenced
this pull request
Feb 17, 2020
Update from 3.3.4 (circa 2014) to 3.3.8 (circa 2018)
to include performance updates and improved compiler
compatibility.
FFTW 3.3.8 May 28th, 2018
Fixed AVX, AVX2 for gcc-8.
By default, FFTW 3.3.7 was broken with gcc-8. AVX and AVX2 code
assumed that the compiler honors the distinction between +0 and -0,
but gcc-8 -ffast-math does not. The default CFLAGS included
-ffast-math . This release ensures that FFTW works with gcc-8
-ffast-math , and removes -ffast-math from the default CFLAGS for good
measure.
FFTW 3.3.7 Oct 29th, 2017
Experimental support for CMake
The primary build mechanism for FFTW remains GNU autoconf/automake.
CMake support is meant to offer an easy way to compile FFTW on
Windows, and as such it does not cover all the features of the
automake build system, such as exotic cycle counters, cross-compiling,
or build of binaries for a mixture of ISA's (e.g., amd64 vs amd64+avx
vs amd64+avx2). Patches are welcome.
Fixes for armv7a cycle counter.
Official support for aarch64, now that we have hardware to test it.
Tweak usage of FMA instructions in a way that favors newer processors (Skylake and Ryzen) over older processors (Haswell).
tests/bench: use 64-bit precision to compute mflops.
FFTW 3.3.6-pl2 Mar 25th, 2017
Bugfix: MPI Fortran-03 headers were missing in FFTW 3.3.6-pl1.
FFTW 3.3.6-pl1 (withdrawn) Jan 16th, 2017
Bugfix: FFTW 3.3.6 had the wrong libtool version number, and generated shared libraries of the form libfftw3.so.2.6.6 instead of libfftw3.so.3.*.
FFTW 3.3.6 (withdrawn) Jan 15th, 2017
The fftw_make_planner_thread_safe() API introduced in 3.3.5 didn't work, and this 3.3.6 fixes it. Sorry about that.
Compilation fixes for IBM XLC.
Compilation fixes for threads on Windows.
fix SIMD autodetection on amd64 when (_MSC_VER > 1500)
FFTW 3.3.5 Jul 31, 2016
New SIMD support:
Power8 VSX instructions in single and double precision. To use, add --enable-vsx to configure.
Support for AVX2 (256-bit FMA instructions). To use, add --enable-avx2 to configure.
Experimental support for AVX512 and KCVI. (--enable-avx512, --enable-kcvi) This code is expected to work but the FFTW maintainers do not have hardware to test it.
Support for AVX128/FMA (for some AMD machines) (--enable-avx128-fma)
Double precision Neon SIMD for aarch64. This code is expected to work but the FFTW maintainers do not have hardware to test it.
generic SIMD support using gcc vector intrinsics.
Add fftw_make_planner_thread_safe() API.
fix #18 (disable float128 for CUDACC).
fix #19: missing Fortran interface for fftwq_alloc_real.
fix #21 (don't use float128 on Portland compilers, which pretend to be gcc).
fix: Avoid segfaults due to double free in MPI transpose.
Special note for distribution maintainers: Although FFTW supports a
zillion SIMD instruction sets, enabling them all at the same time is a
bad idea, because it increases the planning time for minimal gain. We
recommend that general-purpose x86 distributions only enable SSE2 and
perhaps AVX. Users who care about the last ounce of performance should
recompile FFTW themselves.
2 tasks
hjmjohnson
added a commit
to hjmjohnson/ITK
that referenced
this pull request
Jun 2, 2020
Update from 3.3.4 (circa 2014) to 3.3.8 (circa 2018)
to include performance updates and improved compiler
compatibility.
FFTW 3.3.8 May 28th, 2018
Fixed AVX, AVX2 for gcc-8.
By default, FFTW 3.3.7 was broken with gcc-8. AVX and AVX2 code
assumed that the compiler honors the distinction between +0 and -0,
but gcc-8 -ffast-math does not. The default CFLAGS included
-ffast-math . This release ensures that FFTW works with gcc-8
-ffast-math , and removes -ffast-math from the default CFLAGS for good
measure.
FFTW 3.3.7 Oct 29th, 2017
Experimental support for CMake
The primary build mechanism for FFTW remains GNU autoconf/automake.
CMake support is meant to offer an easy way to compile FFTW on
Windows, and as such it does not cover all the features of the
automake build system, such as exotic cycle counters, cross-compiling,
or build of binaries for a mixture of ISA's (e.g., amd64 vs amd64+avx
vs amd64+avx2). Patches are welcome.
Fixes for armv7a cycle counter.
Official support for aarch64, now that we have hardware to test it.
Tweak usage of FMA instructions in a way that favors newer processors (Skylake and Ryzen) over older processors (Haswell).
tests/bench: use 64-bit precision to compute mflops.
FFTW 3.3.6-pl2 Mar 25th, 2017
Bugfix: MPI Fortran-03 headers were missing in FFTW 3.3.6-pl1.
FFTW 3.3.6-pl1 (withdrawn) Jan 16th, 2017
Bugfix: FFTW 3.3.6 had the wrong libtool version number, and generated shared libraries of the form libfftw3.so.2.6.6 instead of libfftw3.so.3.*.
FFTW 3.3.6 (withdrawn) Jan 15th, 2017
The fftw_make_planner_thread_safe() API introduced in 3.3.5 didn't work, and this 3.3.6 fixes it. Sorry about that.
Compilation fixes for IBM XLC.
Compilation fixes for threads on Windows.
fix SIMD autodetection on amd64 when (_MSC_VER > 1500)
FFTW 3.3.5 Jul 31, 2016
New SIMD support:
Power8 VSX instructions in single and double precision. To use, add --enable-vsx to configure.
Support for AVX2 (256-bit FMA instructions). To use, add --enable-avx2 to configure.
Experimental support for AVX512 and KCVI. (--enable-avx512, --enable-kcvi) This code is expected to work but the FFTW maintainers do not have hardware to test it.
Support for AVX128/FMA (for some AMD machines) (--enable-avx128-fma)
Double precision Neon SIMD for aarch64. This code is expected to work but the FFTW maintainers do not have hardware to test it.
generic SIMD support using gcc vector intrinsics.
Add fftw_make_planner_thread_safe() API.
fix InsightSoftwareConsortium#18 (disable float128 for CUDACC).
fix InsightSoftwareConsortium#19: missing Fortran interface for fftwq_alloc_real.
fix InsightSoftwareConsortium#21 (don't use float128 on Portland compilers, which pretend to be gcc).
fix: Avoid segfaults due to double free in MPI transpose.
Special note for distribution maintainers: Although FFTW supports a
zillion SIMD instruction sets, enabling them all at the same time is a
bad idea, because it increases the planning time for minimal gain. We
recommend that general-purpose x86 distributions only enable SSE2 and
perhaps AVX. Users who care about the last ounce of performance should
recompile FFTW themselves.
This file contains hidden or bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
Sign up for free
to join this conversation on GitHub.
Already have an account?
Sign in to comment
Add this suggestion to a batch that can be applied as a single commit.This suggestion is invalid because no changes were made to the code.Suggestions cannot be applied while the pull request is closed.Suggestions cannot be applied while viewing a subset of changes.Only one suggestion per line can be applied in a batch.Add this suggestion to a batch that can be applied as a single commit.Applying suggestions on deleted lines is not supported.You must change the existing code in this line in order to create a valid suggestion.Outdated suggestions cannot be applied.This suggestion has been applied or marked resolved.Suggestions cannot be applied from pending reviews.Suggestions cannot be applied on multi-line comments.Suggestions cannot be applied while the pull request is queued to merge.Suggestion cannot be applied right now. Please check back later.
White list limited branches to build. This will ignore the dashboard
and hook branches.
Use standard MAKEFLAGS environment variable over MAKEJ.
Use less verbose wget bar over dot progress reporting.
Limit number of threads for testing.
Change-Id: I9d840fdd063f0ff6e2ce3f5bc73fdf8c38820ab9