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documentation: Add acquire/release barriers to pairing rules
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It is possible to pair acquire and release barriers with other barriers,
so this commit adds them to the list in the SMP barrier pairing section.

Reported-by: Lai Jiangshan <[email protected]>
Signed-off-by: Paul E. McKenney <[email protected]>
Reviewed-by: Tejun Heo <[email protected]>
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paulmck committed Jun 27, 2014
1 parent c392613 commit e760157
Showing 1 changed file with 6 additions and 4 deletions.
10 changes: 6 additions & 4 deletions Documentation/memory-barriers.txt
Original file line number Diff line number Diff line change
Expand Up @@ -757,10 +757,12 @@ SMP BARRIER PAIRING
When dealing with CPU-CPU interactions, certain types of memory barrier should
always be paired. A lack of appropriate pairing is almost certainly an error.

A write barrier should always be paired with a data dependency barrier or read
barrier, though a general barrier would also be viable. Similarly a read
barrier or a data dependency barrier should always be paired with at least an
write barrier, though, again, a general barrier is viable:
A write barrier should always be paired with a data dependency barrier,
acquire barrier, release barrier, or read barrier, though a general
barrier would also be viable. Similarly a read barrier or a data
dependency barrier should always be paired with at least a write barrier,
an acquire barrier, or a release barrier, though, again, a general
barrier is viable:

CPU 1 CPU 2
=============== ===============
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