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Upgrade deps, remove tablex
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@Gekkio
Gekkio committed Oct 19, 2024
1 parent 2dc379f commit ff06df0
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8 changes: 4 additions & 4 deletions .github/workflows/ci.yml
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Original file line number Diff line number Diff line change
Expand Up @@ -31,14 +31,14 @@ jobs:
run: |
mkdir -p "$HOME/.local/bin"
cd "$HOME/.local/bin"
curl -L https://github.com/typst/typst/releases/download/v0.11.1/typst-x86_64-unknown-linux-musl.tar.xz | tar -xJ --strip-components=1 typst-x86_64-unknown-linux-musl/typst
curl -L https://github.com/casey/just/releases/download/1.28.0/just-1.28.0-x86_64-unknown-linux-musl.tar.gz | tar -xz just
curl -L https://github.com/typst/typst/releases/download/v0.12.0/typst-x86_64-unknown-linux-musl.tar.xz | tar -xJ --strip-components=1 typst-x86_64-unknown-linux-musl/typst
curl -L https://github.com/casey/just/releases/download/1.36.0/just-1.36.0-x86_64-unknown-linux-musl.tar.gz | tar -xz just
echo "$HOME/.local/bin" >> $GITHUB_PATH
- name: Install Font Awesome
run: |
mkdir -p "$HOME/.fonts"
curl -L https://github.com/FortAwesome/Font-Awesome/releases/download/6.5.2/fontawesome-free-6.5.2-desktop.zip -o fontawesome.zip
unzip -j fontawesome.zip 'fontawesome-free-6.5.2-desktop/otfs/*' -d "$HOME/.fonts"
curl -L https://github.com/FortAwesome/Font-Awesome/releases/download/6.6.0/fontawesome-free-6.6.0-desktop.zip -o fontawesome.zip
unzip -j fontawesome.zip 'fontawesome-free-6.6.0-desktop/otfs/*' -d "$HOME/.fonts"
fc-cache
- run: just build
- name: Upload built PDF
Expand Down
32 changes: 16 additions & 16 deletions appendix/memory-map.typ
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Original file line number Diff line number Diff line change
Expand Up @@ -2,12 +2,12 @@

#let detail(..args) = text(7pt, ..args)

#let gbc-bit(content) = cellx(fill: rgb("#FFFFED"), content)
#let gbc-bits(length, content) = colspanx(length, fill: rgb("#FFFFED"), content)
#let gbc-bit(content) = table.cell(fill: rgb("#FFFFED"), content)
#let gbc-bits(length, content) = table.cell(colspan: length, fill: rgb("#FFFFED"), content)

#let unmapped-bit = cellx(fill: rgb("#D3D3D3"))[]
#let unmapped-bit = table.cell(fill: rgb("#D3D3D3"))[]
#let unmapped-bits(length) = range(length).map((_) => unmapped-bit)
#let unmapped-byte = colspanx(8, fill: rgb("D3D3D3"))[]
#let unmapped-byte = table.cell(colspan: 8, fill: rgb("D3D3D3"))[]
#let todo(length) = range(length).map((_) => [])
#set text(9pt)

Expand All @@ -16,19 +16,19 @@
#set page(flipped: true)

#figure(
tablex(
table(
columns: (auto, 1fr, 1fr, 1fr, 1fr, 1fr, 1fr, 1fr, 1fr),
inset: (x: 5pt, y: 3.5pt),
align: (left, center, center, center, center, center, center, center, center),
[], [bit 7], [6], [5], [4], [3], [2], [1], [bit 0],
[#hex("FF00") P1], ..unmapped-bits(2), [P15 #detail[buttons]], [P14 #detail[d-pad]], [P13 #detail[#awesome("\u{f358}") start]], [P12 #detail[#awesome("\u{f35b}") select]], [P11 #detail[#awesome("\u{f359}") B]], [P10 #detail[#awesome("\u{f35a}") A]],
[#hex("FF01") SB], colspanx(8)[SB\<7:0\>],
[#hex("FF01") SB], table.cell(colspan: 8)[SB\<7:0\>],
[#hex("FF02") SC], [SIO_EN], ..unmapped-bits(5), gbc-bit[SIO_FAST], [SIO_CLK],
hex("FF03"), unmapped-byte,
[#hex("FF04") DIV], colspanx(8)[DIVH\<7:0\>],
[#hex("FF05") TIMA], colspanx(8)[TIMA\<7:0\>],
[#hex("FF06") TMA], colspanx(8)[TMA\<7:0\>],
[#hex("FF07") TAC], ..unmapped-bits(5), [TAC_EN], colspanx(2)[TAC_CLK\<1:0\>],
[#hex("FF04") DIV], table.cell(colspan: 8)[DIVH\<7:0\>],
[#hex("FF05") TIMA], table.cell(colspan: 8)[TIMA\<7:0\>],
[#hex("FF06") TMA], table.cell(colspan: 8)[TMA\<7:0\>],
[#hex("FF07") TAC], ..unmapped-bits(5), [TAC_EN], table.cell(colspan: 2)[TAC_CLK\<1:0\>],
hex("FF08"), unmapped-byte,
hex("FF09"), unmapped-byte,
hex("FF0A"), unmapped-byte,
Expand Down Expand Up @@ -62,7 +62,7 @@
#pagebreak()

#figure(
tablex(
table(
columns: (auto, 1fr, 1fr, 1fr, 1fr, 1fr, 1fr, 1fr, 1fr),
inset: (x: 5pt, y: 3.5pt),
align: (left, center, center, center, center, center, center, center, center),
Expand Down Expand Up @@ -108,18 +108,18 @@
#pagebreak()

#figure(
tablex(
table(
columns: (auto, 1fr, 1fr, 1fr, 1fr, 1fr, 1fr, 1fr, 1fr),
inset: (x: 5pt, y: 3.5pt),
align: (left, center, center, center, center, center, center, center, center),
[], [bit 7], [6], [5], [4], [3], [2], [1], [bit 0],
[#hex("FF40") LCDC], [LCD_EN], [WIN_MAP], [WIN_EN], [TILE_SEL], [BG_MAP], [OBJ_SIZE], [OBJ_EN], [BG_EN],
[#hex("FF41") STAT], unmapped-bit, [INTR_LYC], [INTR_M2], [INTR_M1], [INTR_M0], [LYC_STAT], colspanx(2)[LCD_MODE\<1:0\>],
[#hex("FF41") STAT], unmapped-bit, [INTR_LYC], [INTR_M2], [INTR_M1], [INTR_M0], [LYC_STAT], table.cell(colspan: 2)[LCD_MODE\<1:0\>],
[#hex("FF42") SCY], ..todo(8),
[#hex("FF43") SCX], ..todo(8),
[#hex("FF44") LY], ..todo(8),
[#hex("FF45") LYC], ..todo(8),
[#hex("FF46") DMA], colspanx(8)[DMA\<7:0\>],
[#hex("FF46") DMA], table.cell(colspan: 8)[DMA\<7:0\>],
[#hex("FF47") BGP], ..todo(8),
[#hex("FF48") OBP0], ..todo(8),
[#hex("FF49") OBP1], ..todo(8),
Expand Down Expand Up @@ -154,7 +154,7 @@
#pagebreak()

#figure(
tablex(
table(
columns: (auto, 1fr, 1fr, 1fr, 1fr, 1fr, 1fr, 1fr, 1fr),
inset: (x: 5pt, y: 3.5pt),
align: (left, center, center, center, center, center, center, center, center),
Expand Down Expand Up @@ -191,7 +191,7 @@
hex("FF7D"), unmapped-byte,
hex("FF7E"), unmapped-byte,
hex("FF7F"), unmapped-byte,
[#hex("FFFF") IE], colspanx(3)[IE_UNUSED\<2:0\>], [IE_JOYPAD], [IE_SERIAL], [IE_TIMER], [IE_STAT], [IE_VBLANK],
[#hex("FFFF") IE], table.cell(colspan: 3)[IE_UNUSED\<2:0\>], [IE_JOYPAD], [IE_SERIAL], [IE_TIMER], [IE_STAT], [IE_VBLANK],
[], [bit 7], [6], [5], [4], [3], [2], [1], [bit 0],
),
kind: table,
Expand Down
82 changes: 39 additions & 43 deletions chapter/cartridges/mbc1.typ
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Original file line number Diff line number Diff line change
Expand Up @@ -17,7 +17,7 @@ The MBC1 chip includes four registers that affect the behaviour of the chip. Of
)[
#reg-table(
[U], [U], [U], [U], [W-0], [W-0], [W-0], [W-0],
unimpl-bit(), unimpl-bit(), unimpl-bit(), unimpl-bit(), colspanx(4)[RAMG\<3:0\>],
unimpl-bit(), unimpl-bit(), unimpl-bit(), unimpl-bit(), table.cell(colspan: 4)[RAMG\<3:0\>],
[bit 7], [6], [5], [4], [3], [2], [1], [bit 0]
)
#set align(left)
Expand Down Expand Up @@ -46,7 +46,7 @@ When RAM access is disabled, all writes to the external RAM area #hex-range("A00
)[
#reg-table(
[U], [U], [U], [W-0], [W-0], [W-0], [W-0], [W-1],
unimpl-bit(), unimpl-bit(), unimpl-bit(), colspanx(5)[BANK1\<4:0\>],
unimpl-bit(), unimpl-bit(), unimpl-bit(), table.cell(colspan: 5)[BANK1\<4:0\>],
[bit 7], [6], [5], [4], [3], [2], [1], [bit 0]
)
#set align(left)
Expand All @@ -71,7 +71,7 @@ MBC1 doesn't allow the BANK1 register to contain zero (bit pattern #bin("00000")
)[
#reg-table(
[U], [U], [U], [U], [U], [U], [W-0], [W-0],
unimpl-bit(), unimpl-bit(), unimpl-bit(), unimpl-bit(), unimpl-bit(), unimpl-bit(), colspanx(2)[BANK2\<1:0\>],
unimpl-bit(), unimpl-bit(), unimpl-bit(), unimpl-bit(), unimpl-bit(), unimpl-bit(), table.cell(colspan: 2)[BANK2\<1:0\>],
[bit 7], [6], [5], [4], [3], [2], [1], [bit 0]
)
#set align(left)
Expand Down Expand Up @@ -125,22 +125,22 @@ When the #hex-range("4000", "7FFF") addess range is accessed, the effective bank
If the cartridge ROM is smaller than 16 Mbit, there are less ROM address pins to connect to and therefore some bank number bits are ignored. For example, 4 Mbit ROMs only need a 5-bit bank number, so the BANK2 register value is always ignored because those bits are simply not connected to the ROM.

#figure(
tablex(
table(
columns: 4,
auto-hlines: false,
stroke: (y: none),
align: center,
hlinex(),
[], colspanx(3)[ROM address bits],
[Accessed address], colspanx(2)[Bank number], [Address within bank],
hlinex(),
table.hline(),
[], table.cell(colspan: 3)[ROM address bits],
[Accessed address], table.cell(colspan: 2)[Bank number], [Address within bank],
table.hline(),
[], [20-19], [18-14], [13-0],
hlinex(),
table.hline(),
[#hex-range("0000", "3FFF"), MODE = #bin("0")], bin("00"), bin("00000"), [A\<13:0\>],
hlinex(),
table.hline(),
[#hex-range("0000", "3FFF"), MODE = #bin("1")], [BANK2], bin("00000"), [A\<13:0\>],
hlinex(),
table.hline(),
hex-range("4000", "7FFF"), [BANK2], [BANK1], [A\<13:0\>],
hlinex(),
table.hline(),
),
kind: table,
caption: "Mapping of physical ROM address bits in MBC1 carts"
Expand All @@ -155,11 +155,10 @@ Let's assume we have previously written #hex("12") to the BANK1 register and #bi
let bank2 = box(inset: (y: 2pt), fill: rgb("#ff00004c"))[01]
let prefix = box(inset: (y: 2pt))[0b]
let pass(text) = box(inset: (y: 2pt), fill: rgb("#00000019"), text)
tablex(
table(
columns: 3,
align: (left + horizon, right + horizon, left + horizon),
auto-vlines: false,
auto-hlines: false,
stroke: none,
[*Value of the BANK 1 register*],
monotext[#prefix#bank1], [],
[*Value of the BANK 2 register*],
Expand All @@ -183,11 +182,10 @@ Let's assume we have previously requested ROM bank number 68, MBC1 mode is #bin(
let addr(content) = box(inset: (y: 2pt), fill: rgb("#00ff004c"), content)
let prefix = box(inset: (y: 2pt))[0b]
let pass(content) = box(inset: (y: 2pt), fill: rgb("#00000019"), content)
tablex(
table(
columns: 3,
align: (left + horizon, right + horizon, left + horizon),
auto-vlines: false,
auto-hlines: false,
stroke: none,
[*Value of the BANK 1 register*],
monotext[#prefix#bank1("00100")], [],
[*Value of the BANK 2 register*],
Expand All @@ -210,20 +208,20 @@ On boards that have RAM, the A0-A12 cartridge bus signals are connected directly
In MODE #bin("0") the BANK2 register value is not used, so the first RAM bank is always mapped to the #hex-range("A000", "BFFF") area. In MODE #bin("1") the BANK2 register value is used as the bank number.

#figure(
tablex(
table(
columns: 3,
auto-hlines: false,
stroke: (y: none),
align: center + bottom,
hlinex(),
[], colspanx(2)[RAM address bits],
table.hline(),
[], table.cell(colspan: 2)[RAM address bits],
[Accessed address], [Bank number], [Address within bank],
hlinex(),
table.hline(),
[], [14-13], [12-0],
hlinex(),
table.hline(),
[#hex-range("A000", "BFFF"), MODE = #bin("0")], bin("00"), [A\<12:0\>],
hlinex(),
table.hline(),
[#hex-range("A000", "BFFF"), MODE = #bin("1")], [BANK2], [A\<12:0\>],
hlinex(),
table.hline(),
),
kind: table,
caption: "Mapping of physical RAM address bits in MBC1 carts"
Expand All @@ -238,11 +236,10 @@ Let's assume we have previously written #bin("10") to the BANK2 register, MODE i
let addr(content) = box(inset: (y: 2pt), fill: rgb("#00ff004c"), content)
let prefix = box(inset: (y: 2pt))[0b]
let pass(content) = box(inset: (y: 2pt), fill: rgb("#00000019"), content)
tablex(
table(
columns: 3,
align: (left + horizon, right + horizon, left + horizon),
auto-vlines: false,
auto-hlines: false,
stroke: none,
[*Value of the BANK 2 register*],
monotext[#prefix#bank2("10")], [],
[*Address being read*],
Expand All @@ -261,22 +258,22 @@ In MBC1 multicarts bit 4 of the BANK1 register is not physically connected to an
From a ROM banking point of view, multicarts simply skip bit 4 of the BANK1 register, but otherwise the behaviour is the same. MODE #bin("1") guarantees that all ROM accesses, including accesses to #hex-range("0000", "3FFF"), use the BANK2 register value.

#figure(
tablex(
table(
columns: 4,
auto-hlines: false,
stroke: (y: none),
align: center,
hlinex(),
[], colspanx(3)[ROM address bits],
[Accessed address], colspanx(2)[Bank number], [Address within bank],
hlinex(),
table.hline(),
[], table.cell(colspan: 3)[ROM address bits],
[Accessed address], table.cell(colspan: 2)[Bank number], [Address within bank],
table.hline(),
[], [19-18], [17-14], [13-0],
hlinex(),
table.hline(),
[#hex-range("0000", "3FFF"), MODE = #bin("0")], bin("00"), bin("0000"), [A\<13:0\>],
hlinex(),
table.hline(),
[#hex-range("0000", "3FFF"), MODE = #bin("1")], [BANK2], bin("0000"), [A\<13:0\>],
hlinex(),
table.hline(),
hex-range("4000", "7FFF"), [BANK2], [BANK1\<3:0\>], [A\<13:0\>],
hlinex(),
table.hline(),
),
kind: table,
caption: "Mapping of physical ROM address bits in MBC1 multicarts"
Expand All @@ -292,11 +289,10 @@ Let's assume we have previously requested "game number" 3 (= #bin("11")) and ROM
let addr(content) = box(inset: (y: 2pt), fill: rgb("#00ff004c"), content)
let prefix = box(inset: (y: 2pt))[0b]
let pass(content) = box(inset: (y: 2pt), fill: rgb("#00000019"), content)
tablex(
table(
columns: 3,
align: (left + horizon, right + horizon, left + horizon),
auto-vlines: false,
auto-hlines: false,
stroke: none,
[*Value of the BANK 1 register*],
monotext[#prefix#pass("1")#bank1("1101")], [],
[*Value of the BANK 2 register*],
Expand Down
32 changes: 16 additions & 16 deletions chapter/cartridges/mbc2.typ
View file
Original file line number Diff line number Diff line change
Expand Up @@ -21,7 +21,7 @@ The MBC2 chip includes two registers that affect the behaviour of the chip. The
)[
#reg-table(
[U], [U], [U], [U], [W-0], [W-0], [W-0], [W-0],
unimpl-bit(), unimpl-bit(), unimpl-bit(), unimpl-bit(), colspanx(4)[RAMG\<3:0\>],
unimpl-bit(), unimpl-bit(), unimpl-bit(), unimpl-bit(), table.cell(colspan: 4)[RAMG\<3:0\>],
[bit 7], [6], [5], [4], [3], [2], [1], [bit 0]
)
#set align(left)
Expand Down Expand Up @@ -50,7 +50,7 @@ When RAM access is disabled, all writes to the external RAM area #hex-range("A00
)[
#reg-table(
[U], [U], [U], [U], [W-0], [W-0], [W-0], [W-1],
unimpl-bit(), unimpl-bit(), unimpl-bit(), unimpl-bit(), colspanx(4)[ROMB\<3:0\>],
unimpl-bit(), unimpl-bit(), unimpl-bit(), unimpl-bit(), table.cell(colspan: 4)[ROMB\<3:0\>],
[bit 7], [6], [5], [4], [3], [2], [1], [bit 0]
)
#set align(left)
Expand Down Expand Up @@ -78,20 +78,20 @@ When the #hex-range("0000", "3FFF") address range is accessed, the effective ban
When the #hex-range("4000", "7FFF") address range is accessed, the effective bank number is the current ROMB register value.

#figure(
tablex(
table(
columns: 3,
auto-hlines: false,
stroke: (y: none),
align: center,
hlinex(),
[], colspanx(2)[ROM address bits],
table.hline(),
[], table.cell(colspan: 2)[ROM address bits],
[Accessed address], [Bank number], [Address within bank],
hlinex(),
table.hline(),
[], [17-14], [13-0],
hlinex(),
table.hline(),
hex-range("0000", "3FFF"), bin("0000"), [A\<13:0\>],
hlinex(),
table.hline(),
hex-range("4000", "7FFF"), [ROMB], [A\<13:0\>],
hlinex(),
table.hline(),
),
kind: table,
caption: "Mapping of physical ROM address bits in MBC2 carts"
Expand All @@ -106,18 +106,18 @@ MBC2 RAM is only 4-bit RAM, so the upper 4 bits of data do not physically exist
MBC2 RAM consists of 512 addresses, so only A0-A8 matter when accessing the RAM region. There is no banking, and the #hex-range("A000", "BFFF") area is larger than the RAM, so the addresses wrap around. For example, accessing #hex("A000") is the same as accessing #hex("A200"), so it is possible to write to the former address and later read the written data using the latter address.

#figure(
tablex(
table(
columns: 2,
auto-hlines: false,
stroke: (y: none),
align: center + bottom,
hlinex(),
table.hline(),
[], [RAM address bits],
[Accessed address], [],
hlinex(),
table.hline(),
[], [8-0],
hlinex(),
table.hline(),
hex-range("A000", "BFFF"), [A\<8:0\>],
hlinex(),
table.hline(),
),
kind: table,
caption: "Mapping of physical RAM address bits in MBC2 carts"
Expand Down
6 changes: 3 additions & 3 deletions chapter/cartridges/mbc5.typ
View file
Original file line number Diff line number Diff line change
Expand Up @@ -11,7 +11,7 @@ The majority of games for Game Boy Color use the MBC5 chip. MBC5 supports ROM si
)[
#reg-table(
[W-0], [W-0], [W-0], [W-0], [W-0], [W-0], [W-0], [W-0],
colspanx(8)[RAMG\<7:0\>],
table.cell(colspan: 8)[RAMG\<7:0\>],
[bit 7], [6], [5], [4], [3], [2], [1], [bit 0]
)
#set align(left)
Expand Down Expand Up @@ -39,7 +39,7 @@ When RAM access is disabled, all writes to the external RAM area #hex-range("A00
)[
#reg-table(
[W-0], [W-0], [W-0], [W-0], [W-0], [W-0], [W-0], [W-1],
colspanx(8)[ROMB0\<7:0\>],
table.cell(colspan: 8)[ROMB0\<7:0\>],
[bit 7], [6], [5], [4], [3], [2], [1], [bit 0]
)
#set align(left)
Expand Down Expand Up @@ -78,7 +78,7 @@ The 1-bit ROMB1 register is used as the most significant bit (bit 9) of the ROM
)[
#reg-table(
[U], [U], [U], [U], [W-0], [W-0], [W-0], [W-0],
unimpl-bit(), unimpl-bit(), unimpl-bit(), unimpl-bit(), colspanx(4)[RAMB\<3:0\>],
unimpl-bit(), unimpl-bit(), unimpl-bit(), unimpl-bit(), table.cell(colspan: 4)[RAMB\<3:0\>],
[bit 7], [6], [5], [4], [3], [2], [1], [bit 0]
)
#set align(left)
Expand Down
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