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Currently, vector registers are not placed continuously in the stack. Place v31 - v0 in order from high address to low address to facilitate debugger analysis of task stack context.

Vector general register layout:

Before:
+--------------+ <-- High Address
| v7 |
+--------------+
| v6 |
+--------------+
| ... |
+--------------+
| v0 |
+--------------+ <-- v0 - v7
| v15 |
+--------------+
| v14 |
+--------------+
| ... |
+--------------+
| v8 |
+--------------+ <-- v8 - v15
| ... |
+--------------+
| v24 |
+--------------+ <-- Low address

After:
+--------------+ <-- High Address
| v31 |
+--------------+
| v30 |
+--------------+
| ... |
+--------------+
| v1 |
+--------------+
| v0 |
+--------------+ <-- Low Address

Description

Test Steps

Checklist:

  • I have tested my changes. No regression in existing tests.
  • I have modified and/or added unit-tests to cover the code changes in this Pull Request.

Related Issue

By submitting this pull request, I confirm that you can use, modify, copy, and redistribute this contribution, under the terms of your choice.

Vector general register layout:

Before:
+--------------+  <-- High Address
|      v7      |
+--------------+
|      v6      |
+--------------+
|      ...     |
+--------------+
|      v0      |
+--------------+  <-- v0 - v7
|      v15     |
+--------------+
|      v14     |
+--------------+
|      ...     |
+--------------+
|      v8      |
+--------------+  <-- v8 - v15
|      ...     |
+--------------+
|      v24     |
+--------------+  <-- Low address

After:
+--------------+  <-- High Address
|      v31     |
+--------------+
|      v30     |
+--------------+
|      ...     |
+--------------+
|      v1      |
+--------------+
|      v0      |
+--------------+ <-- Low Address

Signed-off-by: wangfei_chen <[email protected]>
@aggarg
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aggarg commented Oct 28, 2025

facilitate debugger analysis of task stack context.

@Saiiijchan Would you please help us understand how does this change facilitate debugger analysis of task stack context?

@Saiiijchan
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facilitate debugger analysis of task stack context.

@Saiiijchan Would you please help us understand how does this change facilitate debugger analysis of task stack context?

Our debugger team is developing a GDB tool for FreeRTOS that can parse the task context from the stack. It would be easier to implement if the registers were arranged sequentially.

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aggarg commented Oct 30, 2025

@Saiiijchan Thank you for sharing!

@sonarqubecloud
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sonarqubecloud bot commented Nov 3, 2025

@aggarg
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aggarg commented Nov 3, 2025

@Saiiijchan I made a change to change the mstatus location in the context. I think it should not have any impact on this change, would you please double confirm that your change still works?

@Saiiijchan
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@aggarg I tested and no problems. However, there are not additional regs on my platfrom.

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aggarg commented Nov 4, 2025

@Saiiijchan Thank you for confirming!

@kstribrnAmzn kstribrnAmzn merged commit 439af33 into FreeRTOS:main Nov 4, 2025
17 checks passed
@Saiiijchan Saiiijchan deleted the refine_rvv_context branch November 5, 2025 00:57
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4 participants