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mbr0wn edited this page Sep 29, 2016
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This is the public repository for Ettus Research FPGA code.
The issue tracker on this repository has been disabled. If you have any questions or doubts, please report them to the usrp-users mailing list.
For actual bug reports, please submit them to the mailing list or the UHD issue tracker: https://github.com/EttusResearch/uhd/issues