Add support for ADC in STM32F769I DISCO (nanoframework#658)

Eclo · Apr 3, 2018 · 7dbdb92 · 7dbdb92
1 parent 8669d8b
commit 7dbdb92
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Showing 3 changed files with 40 additions and 2 deletions.
diff --git a/targets/CMSIS-OS/ChibiOS/ST_STM32F769I_DISCOVERY/CMakeLists.txt b/targets/CMSIS-OS/ChibiOS/ST_STM32F769I_DISCOVERY/CMakeLists.txt
@@ -56,6 +56,11 @@ if(API_Windows.Devices.SerialCommunication)
     list(APPEND API_RELATED_TARGET_SOURCES "${CMAKE_CURRENT_SOURCE_DIR}/target_windows_devices_serialcommunication_config.cpp")    
 endif()
 
+# Windows.Devices.Adc
+if(API_Windows.Devices.Adc)
+    list(APPEND API_RELATED_TARGET_SOURCES "${CMAKE_CURRENT_SOURCE_DIR}/target_windows_devices_adc_config.cpp")
+endif()
+
 #######################################
 
 add_subdirectory("common")

diff --git a/targets/CMSIS-OS/ChibiOS/ST_STM32F769I_DISCOVERY/nanoCLR/mcuconf.h b/targets/CMSIS-OS/ChibiOS/ST_STM32F769I_DISCOVERY/nanoCLR/mcuconf.h
@@ -88,9 +88,9 @@
  * ADC driver system settings.
  */
 #define STM32_ADC_ADCPRE                    ADC_CCR_ADCPRE_DIV4
-#define STM32_ADC_USE_ADC1                  FALSE
+#define STM32_ADC_USE_ADC1                  TRUE
 #define STM32_ADC_USE_ADC2                  FALSE
-#define STM32_ADC_USE_ADC3                  FALSE
+#define STM32_ADC_USE_ADC3                  TRUE
 #define STM32_ADC_ADC1_DMA_STREAM           STM32_DMA_STREAM_ID(2, 4)
 #define STM32_ADC_ADC2_DMA_STREAM           STM32_DMA_STREAM_ID(2, 2)
 #define STM32_ADC_ADC3_DMA_STREAM           STM32_DMA_STREAM_ID(2, 1)

diff --git a/targets/CMSIS-OS/ChibiOS/ST_STM32F769I_DISCOVERY/target_windows_devices_adc_config.cpp b/targets/CMSIS-OS/ChibiOS/ST_STM32F769I_DISCOVERY/target_windows_devices_adc_config.cpp
@@ -0,0 +1,33 @@
+//
+// Copyright (c) 2018 The nanoFramework project contributors
+// See LICENSE file in the project root for full license information.
+//
+
+#include "win_dev_adc_native.h"
+
+//////////
+// ADC1 //
+//////////
+
+const NF_PAL_ADC_PORT_PIN_CHANNEL Adc1PortPinConfig[] = {
+    {GPIOA, 6, ADC_CHANNEL_IN6},
+    {GPIOA, 4, ADC_CHANNEL_IN4},
+    {GPIOC, 2, ADC_CHANNEL_IN12},
+    {GPIOF, 10, ADC_CHANNEL_IN8},
+    {NULL, NULL, ADC_CHANNEL_SENSOR},
+    {NULL, NULL, ADC_CHANNEL_VREFINT},
+    {NULL, NULL, ADC_CHANNEL_VBAT},
+};
+
+const int Adc1ChannelCount = ARRAYSIZE(Adc1PortPinConfig);
+
+//////////
+// ADC3 //
+//////////
+
+const NF_PAL_ADC_PORT_PIN_CHANNEL Adc3PortPinConfig[] = {
+    {GPIOF, 8, ADC_CHANNEL_IN6},
+    {GPIOB, 8, ADC_CHANNEL_IN7},
+};
+
+const int Adc3ChannelCount = ARRAYSIZE(Adc3PortPinConfig);