Second Year Computer Engineering Undergraduate at the University of Peradeniya.
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University of Peradeniya
- Kurunegala, Sri Lanka
- in/Bimsara-Janakantha
Highlights
- Pro
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8-Bit-Single-Cycle-Processor
8-Bit-Single-Cycle-Processor PublicA simple single cycle processor using Verilog HDL
Verilog
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SAP-1_Computer_ALU_Design
SAP-1_Computer_ALU_Design PublicImplementation of the Arithmetic Logic unit of the SAP1 computer, a minimalist educational computer architecture, for the CO221 course project at Department of Computer Engineering - University of …
C++ 1
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