feat: merge-train/barretenberg

barretenberg/cpp/CMakePresets.json

@@ -317,6 +317,7 @@
         "FUZZING": "ON",
         "FUZZING_SHOW_INFORMATION": "ON",
         "DISABLE_AZTEC_VM": "ON",
+        "AVM_TRANSPILER_LIB": "",
         "ENABLE_ASAN": "ON",
         "DISABLE_ASM": "ON",
         "CMAKE_BUILD_TYPE": "RelWithAssert"

barretenberg/cpp/bootstrap.sh

@@ -185,9 +185,12 @@ function build_smt_verification {
   cmake --preset smt-verification
 
   cvc5_cmake_hash=$(cache_content_hash ^barretenberg/cpp/src/barretenberg/smt_verification/CMakeLists.txt)
-  if ! cache_download barretenberg-cvc5-$cvc5_cmake_hash.zst; then
-      cmake --build build-smt --target cvc5
-      cache_upload barretenberg-cvc5-$cvc5_cmake_hash.zst build-smt/_deps/cvc5
+  if cache_download barretenberg-cvc5-$cvc5_cmake_hash.zst; then
+    # Restore machine-dependent paths after downloading cache
+    find build-smt/_deps/cvc5 -type f -name "*.cmake" -exec sed -i "s|/workspace|$(pwd)|g" {} \;
+  else
+    cmake --build build-smt --target cvc5
+    cache_upload barretenberg-cvc5-$cvc5_cmake_hash.zst build-smt/_deps/cvc5
   fi
 
   cmake --build build-smt --target smt_verification_tests

barretenberg/cpp/src/barretenberg/boomerang_value_detection/graph.cpp

@@ -227,11 +227,11 @@ inline std::vector<uint32_t> StaticAnalyzer_<FF, CircuitBuilder>::get_sort_const
         in order to pad a size of indices to gate width. But tool has to ignore these additional variables
         */
         for (const auto& var_idx : row_variables) {
-            if (var_idx != circuit_builder.zero_idx) {
+            if (var_idx != circuit_builder.zero_idx()) {
                 gate_variables.emplace_back(var_idx);
             }
         }
-        if (index != block.size() - 1 && block.w_l()[index + 1] != circuit_builder.zero_idx) {
+        if (index != block.size() - 1 && block.w_l()[index + 1] != circuit_builder.zero_idx()) {
             gate_variables.emplace_back(block.w_l()[index + 1]);
         }
     }
@@ -502,10 +502,10 @@ inline std::vector<uint32_t> StaticAnalyzer_<FF, CircuitBuilder>::get_rom_table_
                 // By default ROM read gate uses variables (w_1, w_2, w_3, w_4) = (index_witness, vc1_witness,
                 // vc2_witness, record_witness) So we can update all of them
                 gate_variables.emplace_back(index_witness);
-                if (vc1_witness != circuit_builder.zero_idx) {
+                if (vc1_witness != circuit_builder.zero_idx()) {
                     gate_variables.emplace_back(vc1_witness);
                 }
-                if (vc2_witness != circuit_builder.zero_idx) {
+                if (vc2_witness != circuit_builder.zero_idx()) {
                     gate_variables.emplace_back(vc2_witness);
                 }
                 gate_variables.emplace_back(record_witness);
@@ -556,10 +556,10 @@ inline std::vector<uint32_t> StaticAnalyzer_<FF, CircuitBuilder>::get_ram_table_
                 // By default RAM read/write gate uses variables (w_1, w_2, w_3, w_4) = (index_witness,
                 // timestamp_witness, value_witness, record_witness) So we can update all of them
                 gate_variables.emplace_back(index_witness);
-                if (timestamp_witness != circuit_builder.zero_idx) {
+                if (timestamp_witness != circuit_builder.zero_idx()) {
                     gate_variables.emplace_back(timestamp_witness);
                 }
-                if (value_witness != circuit_builder.zero_idx) {
+                if (value_witness != circuit_builder.zero_idx()) {
                     gate_variables.emplace_back(value_witness);
                 }
                 gate_variables.emplace_back(record_witness);
@@ -617,7 +617,7 @@ inline std::vector<uint32_t> StaticAnalyzer_<FF, CircuitBuilder>::get_eccop_part
     std::vector<uint32_t> second_row_variables;
     auto w1 = blk.w_l()[index]; // get opcode of operation, because function get_ecc_op_idx returns type
                                 // uint32_t and it adds as w1
-    if (w1 != circuit_builder.zero_idx) {
+    if (w1 != circuit_builder.zero_idx()) {
         // this is opcode and start of the UltraOp element
         first_row_variables.insert(
             first_row_variables.end(),
@@ -809,7 +809,7 @@ void StaticAnalyzer_<FF, CircuitBuilder>::connect_all_variables_in_vector(const
                  variables_vector.end(),
                  std::back_inserter(filtered_variables_vector),
                  [&](uint32_t variable_index) {
-                     return variable_index != circuit_builder.zero_idx &&
+                     return variable_index != circuit_builder.zero_idx() &&
                             this->check_is_not_constant_variable(variable_index);
                  });
     // Remove duplicates
@@ -975,7 +975,7 @@ template <typename FF, typename CircuitBuilder>
 inline size_t StaticAnalyzer_<FF, CircuitBuilder>::process_current_decompose_chain(size_t index)
 {
     auto& arithmetic_block = circuit_builder.blocks.arithmetic;
-    auto zero_idx = circuit_builder.zero_idx;
+    auto zero_idx = circuit_builder.zero_idx();
     size_t current_index = index;
     std::vector<uint32_t> accumulators_indices;
     while (true) {

barretenberg/cpp/src/barretenberg/boomerang_value_detection/graph_description.test.cpp

@@ -662,7 +662,7 @@ TEST(boomerang_ultra_circuit_constructor, composed_range_constraint)
     auto e = fr(d);
     auto a_idx = circuit_constructor.add_variable(fr(e));
     circuit_constructor.create_add_gate(
-        { a_idx, circuit_constructor.zero_idx, circuit_constructor.zero_idx, 1, 0, 0, -fr(e) });
+        { a_idx, circuit_constructor.zero_idx(), circuit_constructor.zero_idx(), 1, 0, 0, -fr(e) });
     circuit_constructor.decompose_into_default_range(a_idx, 134);
 
     StaticAnalyzer graph = StaticAnalyzer(circuit_constructor);

barretenberg/cpp/src/barretenberg/boomerang_value_detection/variable_gates_count.test.cpp

@@ -20,7 +20,7 @@ TEST(boomerang_ultra_circuit_constructor, test_variable_gates_count_for_decompos
     auto e = fr(d);
     auto a_idx = circuit_constructor.add_variable(fr(e));
     circuit_constructor.create_add_gate(
-        { a_idx, circuit_constructor.zero_idx, circuit_constructor.zero_idx, 1, 0, 0, -fr(e) });
+        { a_idx, circuit_constructor.zero_idx(), circuit_constructor.zero_idx(), 1, 0, 0, -fr(e) });
     circuit_constructor.decompose_into_default_range(a_idx, 134);
 
     StaticAnalyzer graph = StaticAnalyzer(circuit_constructor);
@@ -36,7 +36,7 @@ TEST(boomerang_ultra_circuit_constructor, test_variable_gates_count_for_decompos
     auto e = fr(d);
     auto a_idx = circuit_constructor.add_variable(fr(e));
     circuit_constructor.create_add_gate(
-        { a_idx, circuit_constructor.zero_idx, circuit_constructor.zero_idx, 1, 0, 0, -fr(e) });
+        { a_idx, circuit_constructor.zero_idx(), circuit_constructor.zero_idx(), 1, 0, 0, -fr(e) });
     circuit_constructor.decompose_into_default_range(a_idx, 42);
 
     StaticAnalyzer graph = StaticAnalyzer(circuit_constructor);
@@ -78,9 +78,9 @@ TEST(boomerang_ultra_circuit_constructor, test_variable_gates_count_for_two_deco
     auto a1_idx = circuit_constructor.add_variable(fr(e1));
     auto a2_idx = circuit_constructor.add_variable(fr(e2));
     circuit_constructor.create_add_gate(
-        { a1_idx, circuit_constructor.zero_idx, circuit_constructor.zero_idx, 1, 0, 0, -fr(e1) });
+        { a1_idx, circuit_constructor.zero_idx(), circuit_constructor.zero_idx(), 1, 0, 0, -fr(e1) });
     circuit_constructor.create_add_gate(
-        { a2_idx, circuit_constructor.zero_idx, circuit_constructor.zero_idx, 1, 0, 0, -fr(e2) });
+        { a2_idx, circuit_constructor.zero_idx(), circuit_constructor.zero_idx(), 1, 0, 0, -fr(e2) });
     circuit_constructor.decompose_into_default_range(a1_idx, 42);
     circuit_constructor.decompose_into_default_range(a2_idx, 42);
 
@@ -122,7 +122,7 @@ TEST(boomerang_ultra_circuit_constructor, test_decompose_for_6_bit_number)
     auto e = fr(d);
     auto a_idx = circuit_constructor.add_variable(fr(d));
     circuit_constructor.create_add_gate(
-        { a_idx, circuit_constructor.zero_idx, circuit_constructor.zero_idx, 1, 0, 0, -fr(e) });
+        { a_idx, circuit_constructor.zero_idx(), circuit_constructor.zero_idx(), 1, 0, 0, -fr(e) });
     circuit_constructor.decompose_into_default_range(a_idx, 6);
 
     StaticAnalyzer graph = StaticAnalyzer(circuit_constructor);

barretenberg/cpp/src/barretenberg/circuit_checker/ultra_circuit_builder.test.cpp

@@ -112,8 +112,8 @@ TEST(UltraCircuitBuilder, BadLookupFailure)
 
     // Erroneously set a non-zero wire value to zero in one of the lookup gates
     for (auto& wire_3_witness_idx : builder.blocks.lookup.w_o()) {
-        if (wire_3_witness_idx != builder.zero_idx) {
-            wire_3_witness_idx = builder.zero_idx;
+        if (wire_3_witness_idx != builder.zero_idx()) {
+            wire_3_witness_idx = builder.zero_idx();
             break;
         }
     }
@@ -210,8 +210,8 @@ TEST(UltraCircuitBuilder, NonTrivialTagPermutation)
     auto c_idx = builder.add_variable(b);
     auto d_idx = builder.add_variable(a);
 
-    builder.create_add_gate({ a_idx, b_idx, builder.zero_idx, fr::one(), fr::one(), fr::zero(), fr::zero() });
-    builder.create_add_gate({ c_idx, d_idx, builder.zero_idx, fr::one(), fr::one(), fr::zero(), fr::zero() });
+    builder.create_add_gate({ a_idx, b_idx, builder.zero_idx(), fr::one(), fr::one(), fr::zero(), fr::zero() });
+    builder.create_add_gate({ c_idx, d_idx, builder.zero_idx(), fr::one(), fr::one(), fr::zero(), fr::zero() });
 
     builder.create_tag(1, 2);
     builder.create_tag(2, 1);
@@ -256,9 +256,9 @@ TEST(UltraCircuitBuilder, NonTrivialTagPermutationAndCycles)
     builder.assign_tag(e_idx, 2);
     builder.assign_tag(g_idx, 2);
 
-    builder.create_add_gate({ b_idx, a_idx, builder.zero_idx, fr::one(), fr::neg_one(), fr::zero(), fr::zero() });
-    builder.create_add_gate({ c_idx, g_idx, builder.zero_idx, fr::one(), -fr::one(), fr::zero(), fr::zero() });
-    builder.create_add_gate({ e_idx, f_idx, builder.zero_idx, fr::one(), -fr::one(), fr::zero(), fr::zero() });
+    builder.create_add_gate({ b_idx, a_idx, builder.zero_idx(), fr::one(), fr::neg_one(), fr::zero(), fr::zero() });
+    builder.create_add_gate({ c_idx, g_idx, builder.zero_idx(), fr::one(), -fr::one(), fr::zero(), fr::zero() });
+    builder.create_add_gate({ e_idx, f_idx, builder.zero_idx(), fr::one(), -fr::one(), fr::zero(), fr::zero() });
 
     bool result = CircuitChecker::check(builder);
     EXPECT_EQ(result, true);
@@ -278,8 +278,8 @@ TEST(UltraCircuitBuilder, BadTagPermutation)
     auto c_idx = builder.add_variable(b);
     auto d_idx = builder.add_variable(a + 1);
 
-    builder.create_add_gate({ a_idx, b_idx, builder.zero_idx, 1, 1, 0, 0 });
-    builder.create_add_gate({ c_idx, d_idx, builder.zero_idx, 1, 1, 0, -1 });
+    builder.create_add_gate({ a_idx, b_idx, builder.zero_idx(), 1, 1, 0, 0 });
+    builder.create_add_gate({ c_idx, d_idx, builder.zero_idx(), 1, 1, 0, -1 });
 
     bool result = CircuitChecker::check(builder);
     EXPECT_EQ(result, true);
@@ -431,7 +431,7 @@ TEST(UltraCircuitBuilder, RangeConstraint)
             builder.create_new_range_constraint(indices[i], 3);
         }
         // auto ind = {a_idx,b_idx,c_idx,d_idx,e_idx,f_idx,g_idx,h_idx};
-        builder.create_dummy_constraints(indices);
+        builder.create_unconstrained_gates(indices);
         bool result = CircuitChecker::check(builder);
         EXPECT_EQ(result, true);
     }
@@ -452,7 +452,7 @@ TEST(UltraCircuitBuilder, RangeConstraint)
         for (size_t i = 0; i < indices.size(); i++) {
             builder.create_new_range_constraint(indices[i], 128);
         }
-        builder.create_dummy_constraints(indices);
+        builder.create_unconstrained_gates(indices);
         bool result = CircuitChecker::check(builder);
         EXPECT_EQ(result, true);
     }
@@ -463,7 +463,7 @@ TEST(UltraCircuitBuilder, RangeConstraint)
         for (size_t i = 0; i < indices.size(); i++) {
             builder.create_new_range_constraint(indices[i], 79);
         }
-        builder.create_dummy_constraints(indices);
+        builder.create_unconstrained_gates(indices);
         bool result = CircuitChecker::check(builder);
         EXPECT_EQ(result, false);
     }
@@ -474,7 +474,7 @@ TEST(UltraCircuitBuilder, RangeConstraint)
         for (size_t i = 0; i < indices.size(); i++) {
             builder.create_new_range_constraint(indices[i], 79);
         }
-        builder.create_dummy_constraints(indices);
+        builder.create_unconstrained_gates(indices);
         bool result = CircuitChecker::check(builder);
         EXPECT_EQ(result, false);
     }
@@ -488,10 +488,10 @@ TEST(UltraCircuitBuilder, RangeWithGates)
         builder.create_new_range_constraint(idx[i], 8);
     }
 
-    builder.create_add_gate({ idx[0], idx[1], builder.zero_idx, fr::one(), fr::one(), fr::zero(), -3 });
-    builder.create_add_gate({ idx[2], idx[3], builder.zero_idx, fr::one(), fr::one(), fr::zero(), -7 });
-    builder.create_add_gate({ idx[4], idx[5], builder.zero_idx, fr::one(), fr::one(), fr::zero(), -11 });
-    builder.create_add_gate({ idx[6], idx[7], builder.zero_idx, fr::one(), fr::one(), fr::zero(), -15 });
+    builder.create_add_gate({ idx[0], idx[1], builder.zero_idx(), fr::one(), fr::one(), fr::zero(), -3 });
+    builder.create_add_gate({ idx[2], idx[3], builder.zero_idx(), fr::one(), fr::one(), fr::zero(), -7 });
+    builder.create_add_gate({ idx[4], idx[5], builder.zero_idx(), fr::one(), fr::one(), fr::zero(), -11 });
+    builder.create_add_gate({ idx[6], idx[7], builder.zero_idx(), fr::one(), fr::one(), fr::zero(), -15 });
     bool result = CircuitChecker::check(builder);
     EXPECT_EQ(result, true);
 }
@@ -504,10 +504,10 @@ TEST(UltraCircuitBuilder, RangeWithGatesWhereRangeIsNotAPowerOfTwo)
         builder.create_new_range_constraint(idx[i], 12);
     }
 
-    builder.create_add_gate({ idx[0], idx[1], builder.zero_idx, fr::one(), fr::one(), fr::zero(), -3 });
-    builder.create_add_gate({ idx[2], idx[3], builder.zero_idx, fr::one(), fr::one(), fr::zero(), -7 });
-    builder.create_add_gate({ idx[4], idx[5], builder.zero_idx, fr::one(), fr::one(), fr::zero(), -11 });
-    builder.create_add_gate({ idx[6], idx[7], builder.zero_idx, fr::one(), fr::one(), fr::zero(), -15 });
+    builder.create_add_gate({ idx[0], idx[1], builder.zero_idx(), fr::one(), fr::one(), fr::zero(), -3 });
+    builder.create_add_gate({ idx[2], idx[3], builder.zero_idx(), fr::one(), fr::one(), fr::zero(), -7 });
+    builder.create_add_gate({ idx[4], idx[5], builder.zero_idx(), fr::one(), fr::one(), fr::zero(), -11 });
+    builder.create_add_gate({ idx[6], idx[7], builder.zero_idx(), fr::one(), fr::one(), fr::zero(), -15 });
     bool result = CircuitChecker::check(builder);
     EXPECT_EQ(result, true);
 }
@@ -565,15 +565,15 @@ TEST(UltraCircuitBuilder, ComposedRangeConstraint)
     auto d = uint256_t(c).slice(0, 133);
     auto e = fr(d);
     auto a_idx = builder.add_variable(fr(e));
-    builder.create_add_gate({ a_idx, builder.zero_idx, builder.zero_idx, 1, 0, 0, -fr(e) });
+    builder.create_add_gate({ a_idx, builder.zero_idx(), builder.zero_idx(), 1, 0, 0, -fr(e) });
     builder.decompose_into_default_range(a_idx, 134);
 
     // odd num bits - divisible by 3
     auto c_1 = fr::random_element();
     auto d_1 = uint256_t(c_1).slice(0, 126);
     auto e_1 = fr(d_1);
     auto a_idx_1 = builder.add_variable(fr(e_1));
-    builder.create_add_gate({ a_idx_1, builder.zero_idx, builder.zero_idx, 1, 0, 0, -fr(e_1) });
+    builder.create_add_gate({ a_idx_1, builder.zero_idx(), builder.zero_idx(), 1, 0, 0, -fr(e_1) });
     builder.decompose_into_default_range(a_idx_1, 127);
 
     bool result = CircuitChecker::check(builder);
@@ -825,9 +825,9 @@ TEST(UltraCircuitBuilder, RamSimple)
     // Use the result in a simple arithmetic gate
     builder.create_big_add_gate({
         a_idx,
-        builder.zero_idx,
-        builder.zero_idx,
-        builder.zero_idx,
+        builder.zero_idx(),
+        builder.zero_idx(),
+        builder.zero_idx(),
         -1,
         0,
         0,
@@ -886,9 +886,9 @@ TEST(UltraCircuitBuilder, Ram)
         true);
     builder.create_big_add_gate(
         {
-            builder.zero_idx,
-            builder.zero_idx,
-            builder.zero_idx,
+            builder.zero_idx(),
+            builder.zero_idx(),
+            builder.zero_idx(),
             e_idx,
             0,
             0,
@@ -952,9 +952,9 @@ TEST(UltraCircuitBuilder, CheckCircuitShowcase)
     uint32_t b = builder.add_variable(0xbeef);
     // Let's create 2 gates that will bind these 2 variables to be one these two values
     builder.create_poly_gate(
-        { a, a, builder.zero_idx, fr(1), -fr(0xdead) - fr(0xbeef), 0, 0, fr(0xdead) * fr(0xbeef) });
+        { a, a, builder.zero_idx(), fr(1), -fr(0xdead) - fr(0xbeef), 0, 0, fr(0xdead) * fr(0xbeef) });
     builder.create_poly_gate(
-        { b, b, builder.zero_idx, fr(1), -fr(0xdead) - fr(0xbeef), 0, 0, fr(0xdead) * fr(0xbeef) });
+        { b, b, builder.zero_idx(), fr(1), -fr(0xdead) - fr(0xbeef), 0, 0, fr(0xdead) * fr(0xbeef) });
 
     // We can check if this works
     EXPECT_EQ(CircuitChecker::check(builder), true);

barretenberg/cpp/src/barretenberg/client_ivc/client_ivc.cpp

@@ -82,7 +82,7 @@ std::shared_ptr<ClientIVC::RecursiveVerifierInstance> ClientIVC::perform_oink_re
     OinkRecursiveVerifier verifier{ &circuit, verifier_instance, transcript };
     verifier.verify_proof(proof);
 
-    verifier_instance->target_sum = StdlibFF::from_witness_index(&circuit, circuit.zero_idx);
+    verifier_instance->target_sum = StdlibFF::from_witness_index(&circuit, circuit.zero_idx());
     // Get the gate challenges for sumcheck/combiner computation
     verifier_instance->gate_challenges =
         transcript->template get_powers_of_challenge<StdlibFF>("gate_challenge", CONST_PG_LOG_N);

barretenberg/cpp/src/barretenberg/dsl/acir_format/acir_format.cpp

@@ -661,7 +661,7 @@ template <> UltraCircuitBuilder create_circuit(AcirProgram& program, const Progr
     AcirFormat& constraints = program.constraints;
     WitnessVector& witness = program.witness;
 
-    Builder builder{ metadata.size_hint, witness, constraints.public_inputs, constraints.varnum, metadata.recursive };
+    Builder builder{ metadata.size_hint, witness, constraints.public_inputs, constraints.varnum };
 
     build_constraints(builder, program, metadata);
 

barretenberg/cpp/src/barretenberg/dsl/acir_format/acir_integration.test.cpp

@@ -85,7 +85,7 @@ class AcirIntegrationTest : public ::testing::Test {
             val_idx_1,
             val_idx_2,
             val_idx_3,
-            circuit.zero_idx,
+            circuit.zero_idx(),
             1,
             1,
             1,

barretenberg/cpp/src/barretenberg/flavor/mega_flavor.hpp

@@ -179,8 +179,6 @@ class MegaFlavor {
                               databus_id            // column 30 // id polynomial, i.e. id_i = i
         )
 
-        static constexpr CircuitType CIRCUIT_TYPE = CircuitBuilder::CIRCUIT_TYPE;
-
         auto get_non_gate_selectors() { return RefArray{ q_m, q_c, q_l, q_r, q_o, q_4 }; };
         auto get_gate_selectors()
         {

barretenberg/cpp/src/barretenberg/flavor/ultra_flavor.hpp

@@ -182,8 +182,6 @@ class UltraFlavor {
                               lagrange_first,       // column 26
                               lagrange_last)        // column 27
 
-        static constexpr CircuitType CIRCUIT_TYPE = CircuitBuilder::CIRCUIT_TYPE;
-
         auto get_non_gate_selectors() { return RefArray{ q_m, q_c, q_l, q_r, q_o, q_4 }; }
         auto get_gate_selectors()
         {