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6 changes: 6 additions & 0 deletions barretenberg/cpp/pil/vm2/addressing.pil
Original file line number Diff line number Diff line change
Expand Up @@ -13,9 +13,15 @@ pol commit sel_op1_is_address;
pol commit sel_op2_is_address;
pol commit sel_op3_is_address;
pol commit sel_op4_is_address;
pol commit sel_op5_is_address;
pol commit sel_op6_is_address;
pol commit sel_op7_is_address;
// operands after relative resolution
pol commit op1_after_relative;
pol commit op2_after_relative;
pol commit op3_after_relative;
pol commit op4_after_relative;
pol commit op5_after_relative;
pol commit op6_after_relative;
pol commit op7_after_relative;
// operands after indirect resolution are the resolved_operands rop1, ...
25 changes: 24 additions & 1 deletion barretenberg/cpp/pil/vm2/execution.pil
Original file line number Diff line number Diff line change
Expand Up @@ -28,16 +28,39 @@ include "nullifier_check.pil";
namespace execution;

pol commit sel; // subtrace selector
// Subtrace operation id
pol commit subtrace_operation_id;

// Subtrace Dispatch selectors
// These boolean selectors are constrained via the precomputed Execution Instruction Spec Table
pol commit sel_alu;
pol commit sel_bitwise;
pol commit sel_to_radix;
pol commit sel_ecc_add;
pol commit sel_poseidon2_perm;

pol commit ex_opcode;
pol commit indirect;
// operands
pol commit op1, op2, op3, op4;
pol commit op5, op6, op7;
// resolved operands
pol commit rop1, rop2, rop3, rop4;
pol commit rop5, rop6, rop7;
// Registers
pol commit reg1, reg2, reg3, reg4;
pol commit reg5, reg6, reg7;
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These many registers are probably overkill and unnecessary - but we'll keep them here for now until we're sure we don't need them

// Memory Acccesses
pol commit mem_op1, mem_op2, mem_op3, mem_op4;
pol commit mem_op5, mem_op6, mem_op7;
// Memory Tag
pol commit mem_tag1, mem_tag2, mem_tag3, mem_tag4;
pol commit mem_tag5, mem_tag6, mem_tag7;
// Read / Write selectors
pol commit rw1, rw2, rw3, rw4;
pol commit rw5, rw6, rw7;

pol commit bytecode_id;
pol commit clk;
pol commit last;

// Selector constraints
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27 changes: 27 additions & 0 deletions barretenberg/cpp/pil/vm2/precomputed.pil
Original file line number Diff line number Diff line change
Expand Up @@ -95,3 +95,30 @@ pol constant sel_p_decomposition;
pol constant p_decomposition_radix;
pol constant p_decomposition_limb_index;
pol constant p_decomposition_limb;

// EXECUTION INSTRUCTION SPEC table
// Maps an execution opcode value to useful information used during execution
// - Gas Costs
// - Opcode memory operations and destination registers
pol constant exec_opcode_value; // Would be nice to re-use exec_opcode but that has duplicate lines (i.e. ADD_8 & ADD_16 map to ADD)
pol constant exec_opcode_base_l2_gas;
pol constant exec_opcode_base_da_gas;
pol constant exec_opcode_dynamic_l2_gas;
pol constant exec_opcode_dynamic_da_gas;
// Memory Access + Register mappings
pol constant mem_op_reg1, rw_1;
pol constant mem_op_reg2, rw_2;
pol constant mem_op_reg3, rw_3;
pol constant mem_op_reg4, rw_4;
pol constant mem_op_reg5, rw_5;
pol constant mem_op_reg6, rw_6;
pol constant mem_op_reg7, rw_7;
// Subtrace/Gadget Selector
pol constant sel_dispatch_alu;
pol constant sel_dispatch_bitwise;
pol constant sel_dispatch_poseidon_perm;
pol constant sel_dispatch_to_radix;
pol constant sel_dispatch_ecc;
// Add more here
pol constant subtrace_operation_id;

15 changes: 8 additions & 7 deletions barretenberg/cpp/src/barretenberg/vm2/common/tagged_value.hpp
Original file line number Diff line number Diff line change
Expand Up @@ -6,19 +6,20 @@
#include <variant>

#include "barretenberg/numeric/uint128/uint128.hpp"
#include "barretenberg/vm2/common/aztec_constants.hpp"
#include "barretenberg/vm2/common/field.hpp"
#include "barretenberg/vm2/common/uint1.hpp"

namespace bb::avm2 {

enum class ValueTag {
FF,
U1,
U8,
U16,
U32,
U64,
U128,
FF = MEM_TAG_FF,
U1 = MEM_TAG_U1,
U8 = MEM_TAG_U8,
U16 = MEM_TAG_U16,
U32 = MEM_TAG_U32,
U64 = MEM_TAG_U64,
U128 = MEM_TAG_U128,
MAX = U128,
};

Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -21,8 +21,8 @@ TEST(ExecutionConstrainingTest, Basic)
{
// clang-format off
TestTraceContainer trace({
{{ C::execution_sel, 1 }, {C::execution_clk, 0}, { C::execution_pc, 0 }},
{{ C::execution_sel, 1 }, {C::execution_clk, 1}, { C::execution_pc, 20 }, { C::execution_last, 1 }}
{{ C::execution_sel, 1 }, { C::execution_pc, 0 }},
{{ C::execution_sel, 1 }, { C::execution_pc, 20 }, { C::execution_last, 1 }}
});
// clang-format on

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8 changes: 4 additions & 4 deletions barretenberg/cpp/src/barretenberg/vm2/generated/columns.hpp

Large diffs are not rendered by default.

Original file line number Diff line number Diff line change
Expand Up @@ -50,11 +50,11 @@
namespace bb::avm2 {

struct AvmFlavorVariables {
static constexpr size_t NUM_PRECOMPUTED_ENTITIES = 45;
static constexpr size_t NUM_WITNESS_ENTITIES = 2026;
static constexpr size_t NUM_PRECOMPUTED_ENTITIES = 70;
static constexpr size_t NUM_WITNESS_ENTITIES = 2071;
static constexpr size_t NUM_SHIFTED_ENTITIES = 135;
static constexpr size_t NUM_WIRES = NUM_WITNESS_ENTITIES + NUM_PRECOMPUTED_ENTITIES;
static constexpr size_t NUM_ALL_ENTITIES = 2206;
static constexpr size_t NUM_ALL_ENTITIES = 2276;

// Need to be templated for recursive verifier
template <typename FF_>
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Original file line number Diff line number Diff line change
Expand Up @@ -6,6 +6,7 @@
#include "barretenberg/vm2/common/aztec_types.hpp"
#include "barretenberg/vm2/common/memory_types.hpp"
#include "barretenberg/vm2/common/opcodes.hpp"
#include "barretenberg/vm2/common/tagged_value.hpp"
#include "barretenberg/vm2/simulation/events/addressing_event.hpp"
#include "barretenberg/vm2/simulation/events/bytecode_events.hpp"
#include "barretenberg/vm2/simulation/events/context_events.hpp"
Expand All @@ -22,6 +23,11 @@ struct ExecutionEvent {
ExecutionOpCode opcode;
std::vector<Operand> resolved_operands;

// Inputs and Outputs for a gadget/subtrace used when allocating registers in the execution trace.
std::vector<TaggedValue> inputs;
// todo(ilyas): this is a vector because GETCONTRACTINSTANCE has 2 outputs, we should change this to 1
std::vector<TaggedValue> output;

// Sub-events.
AddressingEvent addressing_event;
ContextEvent context_event;
Expand Down
15 changes: 14 additions & 1 deletion barretenberg/cpp/src/barretenberg/vm2/simulation/execution.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -20,19 +20,27 @@ void Execution::add(ContextInterface& context, MemoryAddress a_addr, MemoryAddre
MemoryValue b = memory.get(b_addr);
MemoryValue c = alu.add(a, b);
memory.set(dst_addr, c);

set_inputs({ a, b });
set_outputs({ c });
}

// TODO: My dispatch system makes me have a uint8_t tag. Rethink.
void Execution::set(ContextInterface& context, MemoryAddress dst_addr, uint8_t tag, FF value)
{
context.get_memory().set(dst_addr, MemoryValue::from_tag(static_cast<ValueTag>(tag), value));
TaggedValue tagged_value = TaggedValue::from_tag(static_cast<ValueTag>(tag), value);
context.get_memory().set(dst_addr, tagged_value);
set_outputs({ tagged_value });
}

void Execution::mov(ContextInterface& context, MemoryAddress src_addr, MemoryAddress dst_addr)
{
auto& memory = context.get_memory();
auto v = memory.get(src_addr);
memory.set(dst_addr, v);

set_inputs({ v });
set_outputs({ v });
}

void Execution::call(ContextInterface& context, MemoryAddress addr, MemoryAddress cd_offset, MemoryAddress cd_size)
Expand Down Expand Up @@ -89,6 +97,8 @@ void Execution::jumpi(ContextInterface& context, MemoryAddress cond_addr, uint32
if (!resolved_cond.as_ff().is_zero()) {
context.set_next_pc(loc);
}

set_inputs({ resolved_cond });
}

// This context interface is an top-level enqueued one
Expand Down Expand Up @@ -135,6 +145,9 @@ ExecutionResult Execution::execute_internal(ContextInterface& context)

// Execute the opcode.
dispatch_opcode(opcode, context, resolved_operands);
// TODO: we set the inputs and outputs here and into the execution event, but maybe there's a better way
ex_event.inputs = get_inputs();
ex_event.output = get_outputs();

// Move on to the next pc.
context.set_pc(context.get_next_pc());
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11 changes: 11 additions & 0 deletions barretenberg/cpp/src/barretenberg/vm2/simulation/execution.hpp
Original file line number Diff line number Diff line change
Expand Up @@ -10,6 +10,7 @@
#include "barretenberg/vm2/common/field.hpp"
#include "barretenberg/vm2/common/memory_types.hpp"
#include "barretenberg/vm2/common/opcodes.hpp"
#include "barretenberg/vm2/common/tagged_value.hpp"
#include "barretenberg/vm2/simulation/addressing.hpp"
#include "barretenberg/vm2/simulation/alu.hpp"
#include "barretenberg/vm2/simulation/context.hpp"
Expand Down Expand Up @@ -66,6 +67,13 @@ class Execution : public ExecutionInterface {
void call(ContextInterface& context, MemoryAddress addr, MemoryAddress cd_offset, MemoryAddress cd_size);
void ret(ContextInterface& context, MemoryAddress ret_offset, MemoryAddress ret_size_offset);

// TODO(#13683): This is leaking circuit implementation details. We should have a better way to do this.
// Setters for inputs and outputs for gadgets/subtraces. These are used for register allocation.
void set_inputs(std::vector<TaggedValue> inputs) { this->inputs = std::move(inputs); }
void set_outputs(std::vector<TaggedValue> outputs) { this->outputs = std::move(outputs); }
const std::vector<TaggedValue>& get_inputs() const { return inputs; }
const std::vector<TaggedValue>& get_outputs() const { return outputs; }

private:
void set_execution_result(ExecutionResult exec_result) { this->exec_result = exec_result; }
ExecutionResult get_execution_result() const { return exec_result; }
Expand All @@ -89,6 +97,9 @@ class Execution : public ExecutionInterface {
EventEmitterInterface<ContextStackEvent>& ctx_stack_events;

ExecutionResult exec_result;

std::vector<TaggedValue> inputs;
std::vector<TaggedValue> outputs;
};

} // namespace bb::avm2::simulation
Original file line number Diff line number Diff line change
Expand Up @@ -58,7 +58,6 @@ TEST_F(ExecutionSimulationTest, Add)

TEST_F(ExecutionSimulationTest, Call)
{

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🙏

AztecAddress parent_address = 1;
AztecAddress nested_address = 2;
MemoryValue nested_address_value = MemoryValue::from<FF>(nested_address);
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