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chore: addressing remaining feedback in PR 12182 #12494
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1cf9ecd
12193: Add size_in_bytes into instruction spec and encoding instruction
jeanmon 2267b56
12193: add serialization unit tests
jeanmon bf1c644
12193: Use empty trace from fixtures.hpp
jeanmon bf6322e
12193: add instruction size_in_bytes in precomputed and instr_fetching
jeanmon 1470c85
12193: Add size_in_bytes field for SUCCESSCOPY opcode
jeanmon c6091d5
12193: Add test for tracegen for instr fetching
jeanmon 9d1d136
12193: Negative test on operand decompositions in instruction fetching
jeanmon 696421c
12193: Add interaction positive tests for instr fetching
jeanmon fc71ec2
12193: Add negative interaction tests for instr fetching
jeanmon 76e4ffd
12193: Addressing review feedback
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206 changes: 160 additions & 46 deletions
206
barretenberg/cpp/src/barretenberg/vm2/common/instruction_spec.cpp
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39 changes: 39 additions & 0 deletions
39
barretenberg/cpp/src/barretenberg/vm2/common/instruction_spec.test.cpp
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,39 @@ | ||
| #include <gmock/gmock.h> | ||
| #include <gtest/gtest.h> | ||
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| #include "barretenberg/vm2/common/instruction_spec.hpp" | ||
| #include "barretenberg/vm2/common/opcodes.hpp" | ||
| #include "barretenberg/vm2/simulation/lib/serialization.hpp" | ||
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| namespace bb::avm2 { | ||
| namespace { | ||
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| size_t compute_instruction_size(WireOpCode wire_opcode, | ||
| const std::unordered_map<WireOpCode, std::vector<simulation::OperandType>>& wire_format, | ||
| const std::unordered_map<simulation::OperandType, uint32_t>& operand_type_sizes) | ||
| { | ||
| size_t instr_size = 1; // Take into account the opcode byte | ||
| for (const auto& operand_type : wire_format.at(wire_opcode)) { | ||
| instr_size += operand_type_sizes.at(operand_type); | ||
| } | ||
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| return instr_size; | ||
| } | ||
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| // Test checking that the hardcoded size for each instruction specified in WIRE_INSTRUCTION_SPEC | ||
| // is correct. This test would fail only when we change the wire format of an instruction. | ||
| TEST(InstructionSpecTest, CheckAllInstructionSizes) | ||
| { | ||
| const auto& wire_format = simulation::testonly::get_instruction_wire_formats(); | ||
| const auto& operand_type_sizes = simulation::testonly::get_operand_type_sizes(); | ||
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| for (int i = 0; i < static_cast<int>(WireOpCode::LAST_OPCODE_SENTINEL); i++) { | ||
| const auto wire_opcode = static_cast<WireOpCode>(i); | ||
| const auto computed_size = compute_instruction_size(wire_opcode, wire_format, operand_type_sizes); | ||
| EXPECT_EQ(WIRE_INSTRUCTION_SPEC.at(wire_opcode).size_in_bytes, computed_size) | ||
| << "Incorrect size_in_bytes field for " << wire_opcode << " in WIRE_INSTRUCTION_SPEC."; | ||
| } | ||
| } | ||
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| } // namespace | ||
| } // namespace bb::avm2 | ||
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