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Aswin-Raj-K/README.md

Hi there 👋

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  1. RV32I-Processor-Design RV32I-Processor-Design Public

    Implementation of RV32I Processor on the Basys 3

    Verilog 1 2

  2. FSCV-Multi-Channel-Chip-Readout-Board FSCV-Multi-Channel-Chip-Readout-Board Public

    PostScript 1

  3. NIDAQInterface NIDAQInterface Public

    Python 1

  4. SHA-256-ASIC-for-Bitcoin-Mining SHA-256-ASIC-for-Bitcoin-Mining Public

    Forked from WickedStereo/SHA-256-ASIC-for-Bitcoin-Mining

    SystemVerilog

  5. SRAM-256X4b-BIST SRAM-256X4b-BIST Public

    Verilog

  6. CompressorStateMonitor CompressorStateMonitor Public

    A standalone device is plugged into the compressor to notify about any errors in the system, such as high water temperature, low water flow, and its running status.

    C++