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Add support for target details (CPUs and their supported features) #4264

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merged 64 commits into from
Jan 26, 2020
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0f46c12
Create initial target details infrastructure
layneson Dec 16, 2019
8f191e0
Update term feature deps -> subfeatures
layneson Dec 16, 2019
8ac138a
Add parseArchTag and fix parseArchSub
layneson Dec 17, 2019
21908e1
Fix CPU and feature defs
layneson Dec 17, 2019
5bc4690
Make targets cmd able to list CPUs and features
layneson Dec 17, 2019
9d66bda
Fix spacing in main.cpp
layneson Dec 17, 2019
c131e50
Switch CPU/features to simple format
layneson Dec 21, 2019
c8f1e0d
Remove llvm_name from features
layneson Dec 21, 2019
bd6ef21
Add cpu/feature specification to cmndline
layneson Dec 21, 2019
b3324f1
Add cpu/feature to cache hash
layneson Dec 22, 2019
c1798cb
Add build.zig cpu and feature options
layneson Dec 22, 2019
5137220
Filter out non-features
layneson Jan 4, 2020
e4ecdef
Rename subfeatures -> dependencies
layneson Jan 7, 2020
79a2747
Add llvm_name to feature defs
layneson Jan 9, 2020
c61856e
Add TargetDetails abstraction
layneson Jan 9, 2020
03dd376
Add builtin.zig support
layneson Jan 9, 2020
fd17a99
Add defaut feature support
layneson Jan 9, 2020
ebb6f15
Make sure llvm strings are null-terminated
layneson Jan 9, 2020
40ff359
Only enable requested features
layneson Jan 15, 2020
a5c9397
No allocations for n.t. empty strings
layneson Jan 15, 2020
de8a5cf
Remove features/cpus not in LLVM v9
layneson Jan 16, 2020
8902f3c
Enable 64bit feature for riscv64
layneson Jan 16, 2020
35c681b
Fix sentinel mismatch in llvm strings
layneson Jan 16, 2020
62e4cc0
Pass target details to c compiler
layneson Jan 16, 2020
430077d
Allow target details with no LLVM support
layneson Jan 16, 2020
c156234
Pass target_details to child CodeGens
layneson Jan 17, 2020
a867b43
progress towards merging
andrewrk Jan 19, 2020
a313f15
figure out zig0/stage1 and scanning for native CPU
andrewrk Jan 19, 2020
e3b5e91
do the x86 arch
andrewrk Jan 20, 2020
20af858
some fixes
andrewrk Jan 20, 2020
8f29d14
stage1 is building. `zig targets` now self-hosted
andrewrk Jan 20, 2020
bf82929
fix std.Target.Arch.parseCpuFeatureSet
andrewrk Jan 20, 2020
f3dd9bb
improve `zig targets`
andrewrk Jan 20, 2020
6e88883
import data from llvm 9
andrewrk Jan 21, 2020
6dd514a
aarch64: remove CPU features that are actually just CPUs
andrewrk Jan 21, 2020
89e107e
uncomment all the archs in target.zig
andrewrk Jan 21, 2020
6118b11
Revert "aarch64: remove CPU features that are actually just CPUs"
andrewrk Jan 21, 2020
e640d01
fixups to arch data, support any number of cpu features
andrewrk Jan 21, 2020
39759b9
make zig targets show native cpu name and features
andrewrk Jan 21, 2020
0c2dde2
add libc and glibcs to self-hosted zig targets
andrewrk Jan 21, 2020
5974f95
add cpus and cpu features to zig targets
andrewrk Jan 21, 2020
0abaee7
fix self-hosted compiler regression
andrewrk Jan 21, 2020
1f7babb
properly forward baseline target cpu features to llvm
andrewrk Jan 21, 2020
327ad0a
target_triple_llvm: emit none instead of unknown
andrewrk Jan 21, 2020
6793af8
these are not real cpu features
andrewrk Jan 21, 2020
91ecce3
fix cache of cpu features
andrewrk Jan 21, 2020
15d5cab
fix target_triple_zig to emit zig-compatible triples
andrewrk Jan 21, 2020
92559cd
hit a comptime limitation with computing dense sets
andrewrk Jan 22, 2020
68b6867
lazily compute the full cpu features dependencies
andrewrk Jan 22, 2020
6e6ec3d
put hack back in to disable windows native cpu features
andrewrk Jan 22, 2020
4640ef5
tests: use an older aarch64 sub-arch
andrewrk Jan 22, 2020
830e0ba
enable native CPU feature for windows; disable failing tests
andrewrk Jan 22, 2020
cbe9a51
don't trust llvm's GetHostCPUName
andrewrk Jan 22, 2020
c6bfece
Revert "tests: use an older aarch64 sub-arch"
andrewrk Jan 22, 2020
48c7e6c
std.Target.CpuFeatures is now a struct with both CPU and feature set
andrewrk Jan 22, 2020
3227aec
fix not respecting sub-arch feature
andrewrk Jan 22, 2020
0c477f3
fix std.Target.Arch.parseCpuFeatureSet unit test
andrewrk Jan 22, 2020
9845264
aarch64: less feature-full baseline CPU
andrewrk Jan 22, 2020
ead7d15
use an older arm64 sub-arch for test suite
andrewrk Jan 23, 2020
c86589a
disable f128 compiler_rt tests failing on windows
andrewrk Jan 23, 2020
fbfda7f
fix incorrect list of sub-arches for aarch64
andrewrk Jan 23, 2020
9dffc36
Merge remote-tracking branch 'origin/master' into layneson-cpus_and_f…
andrewrk Jan 26, 2020
d9fb6c2
fix compilation error
andrewrk Jan 26, 2020
3839ea8
fix debug info code not being freestanding compatible
andrewrk Jan 26, 2020
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6 changes: 3 additions & 3 deletions lib/std/buffer.zig
Original file line number Diff line number Diff line change
Expand Up @@ -57,11 +57,11 @@ pub const Buffer = struct {

/// The caller owns the returned memory. The Buffer becomes null and
/// is safe to `deinit`.
pub fn toOwnedSlice(self: *Buffer) []u8 {
pub fn toOwnedSlice(self: *Buffer) [:0]u8 {
const allocator = self.list.allocator;
const result = allocator.shrink(self.list.items, self.len());
const result = self.list.toOwnedSlice();
self.* = initNull(allocator);
return result;
return result[0 .. result.len - 1 :0];
}

pub fn allocPrint(allocator: *Allocator, comptime format: []const u8, args: var) !Buffer {
Expand Down
41 changes: 40 additions & 1 deletion lib/std/build.zig
Original file line number Diff line number Diff line change
Expand Up @@ -484,6 +484,7 @@ pub const Builder = struct {
.arch = builtin.arch,
.os = builtin.os,
.abi = builtin.abi,
.cpu_features = builtin.cpu_features,
},
}).linuxTriple(self.allocator);

Expand Down Expand Up @@ -1375,6 +1376,7 @@ pub const LibExeObjStep = struct {
.arch = target_arch,
.os = target_os,
.abi = target_abi,
.cpu_features = target_arch.getBaselineCpuFeatures(),
},
});
}
Expand Down Expand Up @@ -1970,9 +1972,46 @@ pub const LibExeObjStep = struct {

switch (self.target) {
.Native => {},
.Cross => {
.Cross => |cross| {
try zig_args.append("-target");
try zig_args.append(self.target.zigTriple(builder.allocator) catch unreachable);

const all_features = self.target.getArch().allFeaturesList();
var populated_cpu_features = cross.cpu_features.cpu.features;
populated_cpu_features.populateDependencies(all_features);

if (populated_cpu_features.eql(cross.cpu_features.features)) {
// The CPU name alone is sufficient.
// If it is the baseline CPU, no command line args are required.
if (cross.cpu_features.cpu != self.target.getArch().getBaselineCpuFeatures().cpu) {
try zig_args.append("-target-cpu");
try zig_args.append(cross.cpu_features.cpu.name);
}
} else {
try zig_args.append("-target-cpu");
try zig_args.append(cross.cpu_features.cpu.name);

try zig_args.append("-target-feature");
var feature_str_buffer = try std.Buffer.initSize(builder.allocator, 0);
for (all_features) |feature, i_usize| {
const i = @intCast(Target.Cpu.Feature.Set.Index, i_usize);
const in_cpu_set = populated_cpu_features.isEnabled(i);
const in_actual_set = cross.cpu_features.features.isEnabled(i);
if (in_cpu_set and !in_actual_set) {
try feature_str_buffer.appendByte('-');
try feature_str_buffer.append(feature.name);
try feature_str_buffer.appendByte(',');
} else if (!in_cpu_set and in_actual_set) {
try feature_str_buffer.appendByte('+');
try feature_str_buffer.append(feature.name);
try feature_str_buffer.appendByte(',');
}
}
if (mem.endsWith(u8, feature_str_buffer.toSliceConst(), ",")) {
feature_str_buffer.shrink(feature_str_buffer.len() - 1);
}
try zig_args.append(feature_str_buffer.toSliceConst());
}
},
}

Expand Down
9 changes: 9 additions & 0 deletions lib/std/builtin.zig
Original file line number Diff line number Diff line change
@@ -1,5 +1,8 @@
pub usingnamespace @import("builtin");

/// Deprecated: use `std.Target.Os`.
pub const Target = std.Target;

/// Deprecated: use `std.Target.Os`.
pub const Os = std.Target.Os;

Expand All @@ -15,6 +18,12 @@ pub const ObjectFormat = std.Target.ObjectFormat;
/// Deprecated: use `std.Target.SubSystem`.
pub const SubSystem = std.Target.SubSystem;

/// Deprecated: use `std.Target.CpuFeatures`.
pub const CpuFeatures = std.Target.CpuFeatures;

/// Deprecated: use `std.Target.Cpu`.
pub const Cpu = std.Target.Cpu;

/// `explicit_subsystem` is missing when the subsystem is automatically detected,
/// so Zig standard library has the subsystem detection logic here. This should generally be
/// used rather than `explicit_subsystem`.
Expand Down
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