boards/arm: Enabling SPI ports on nucleo_f103rb

Current configuration was choosen to avoid colliding with existing ones
for i2c and uart, but others can be used.

Signed-off-by: Tomasz Bursztyka <[email protected]>

Author: Tomasz Bursztyka

boards/arm/nucleo_f103rb/Kconfig.defconfig

@@ -24,4 +24,14 @@ config PWM_STM32_1
 
 endif # PWM
 
+if SPI
+
+config SPI_1
+	default y
+
+config SPI_2
+	default y
+
+endif
+
 endif # BOARD_NUCLEO_F103RB

boards/arm/nucleo_f103rb/nucleo_f103rb.dts

@@ -36,3 +36,11 @@
 	pinctrl-0 = <&usart3_pins_a>;
 	pinctrl-names = "default";
 };
+
+&spi1 {
+      status = "ok";
+};
+
+&spi2 {
+      status = "ok";
+};

boards/arm/nucleo_f103rb/pinmux.c

@@ -29,6 +29,18 @@ static const struct pin_config pinconf[] = {
 #ifdef CONFIG_PWM_STM32_1
 	{STM32_PIN_PA8, STM32F1_PINMUX_FUNC_PA8_PWM1_CH1},
 #endif /* CONFIG_PWM_STM32_1 */
+#ifdef CONFIG_SPI_1
+	{STM32_PIN_PA4, STM32F1_PINMUX_FUNC_PA4_SPI1_MASTER_NSS},
+	{STM32_PIN_PA5, STM32F1_PINMUX_FUNC_PA5_SPI1_MASTER_SCK},
+	{STM32_PIN_PA6, STM32F1_PINMUX_FUNC_PA6_SPI1_MASTER_MISO},
+	{STM32_PIN_PA7, STM32F1_PINMUX_FUNC_PA7_SPI1_MASTER_MOSI},
+#endif /* CONFIG_SPI_1 */
+#ifdef CONFIG_SPI_2
+	{STM32_PIN_PB12, STM32F1_PINMUX_FUNC_PB12_SPI2_MASTER_NSS},
+	{STM32_PIN_PB13, STM32F1_PINMUX_FUNC_PB13_SPI2_MASTER_SCK},
+	{STM32_PIN_PB14, STM32F1_PINMUX_FUNC_PB14_SPI2_MASTER_MISO},
+	{STM32_PIN_PB15, STM32F1_PINMUX_FUNC_PB15_SPI2_MASTER_MOSI},
+#endif /* CONFIG_SPI_2 */
 };
 
 static int pinmux_stm32_init(struct device *port)