drivers: pinctrl: nrf: add support for MSPI

Support for new MSPI peripheral where there is no PSEL
so pins are setup through CTRLSEL.

Signed-off-by: David Jewsbury <[email protected]>

Author: Hi-Im-David

drivers/pinctrl/pinctrl_nrf.c

@@ -531,6 +531,19 @@ int pinctrl_configure_pins(const pinctrl_soc_pin_t *pins, uint8_t pin_cnt,
 			input = NRF_GPIO_PIN_INPUT_DISCONNECT;
 			break;
 #endif /* DT_HAS_COMPAT_STATUS_OKAY(nordic_nrf_exmif) */
+#if DT_HAS_COMPAT_STATUS_OKAY(nordic_nrf_mspi)
+		/* No PSEL for MSPI, pins only controlled by CTRLSEL */
+		case NRF_FUN_MSPI_CSN:
+		case NRF_FUN_MSPI_SCK:
+		case NRF_FUN_MSPI_DQ0:
+		case NRF_FUN_MSPI_DQ1:
+		case NRF_FUN_MSPI_DQ2:
+		case NRF_FUN_MSPI_DQ3:
+			nrf_gpio_pin_control_select(psel, NRF_GPIO_PIN_SEL_QSPI);
+			dir = NRF_GPIO_PIN_DIR_OUTPUT;
+			input = NRF_GPIO_PIN_INPUT_CONNECT;
+			break;
+#endif /* DT_HAS_COMPAT_STATUS_OKAY(nordic_nrf_mspi) */
 #if defined(NRF_PSEL_TWIS)
 		case NRF_FUN_TWIS_SCL:
 			NRF_PSEL_TWIS(reg, SCL) = psel;

include/zephyr/dt-bindings/pinctrl/nrf-pinctrl.h

@@ -186,6 +186,18 @@
 #define NRF_FUN_TDM_SDOUT        76U
 /** TDM MCK */
 #define NRF_FUN_TDM_MCK          77U
+/** MSPI version 2 Chip select */
+#define NRF_FUN_MSPI_CSN         78U
+/** MSPI version 2 Clock pin */
+#define NRF_FUN_MSPI_SCK         79U
+/** MSPI version 2 Data pin 0 */
+#define NRF_FUN_MSPI_DQ0         80U
+/** MSPI version 2 Data pin 1 */
+#define NRF_FUN_MSPI_DQ1         81U
+/** MSPI version 2 Data pin 2 */
+#define NRF_FUN_MSPI_DQ2         82U
+/** MSPI version 2 Data pin 3 */
+#define NRF_FUN_MSPI_DQ3         83U
 
 /** @} */