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hal.c
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hal.c
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//#############################################################################
// $Copyright:
// Copyright (C) 2017-2023 Texas Instruments Incorporated - http://www.ti.com/
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions
// are met:
//
// Redistributions of source code must retain the above copyright
// notice, this list of conditions and the following disclaimer.
//
// Redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the
// distribution.
//
// Neither the name of Texas Instruments Incorporated nor the names of
// its contributors may be used to endorse or promote products derived
// from this software without specific prior written permission.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
// $
//#############################################################################
// **************************************************************************
// Contains the various functions related to the HAL object
// **************************************************************************
// the includes
// drivers
// modules
#include "user.h"
// platforms
#include "hal.h"
#include "hal_obj.h"
// libraries
#include "datalog.h"
#ifdef _FLASH
#pragma CODE_SECTION(Flash_initModule, ".TI.ramfunc");
#endif
// **************************************************************************
// the defines
// **************************************************************************
// the globals
// **************************************************************************
// the functions
void HAL_cal(HAL_Handle handle)
{
return;
} // end of HAL_cal() function
void HAL_disableGlobalInts(HAL_Handle handle)
{
// disable global interrupts
Interrupt_disableMaster();
return;
} // end of HAL_disableGlobalInts() function
void HAL_disableWdog(HAL_Handle halHandle)
{
// disable watchdog
SysCtl_disableWatchdog();
return;
} // end of HAL_disableWdog() function
void HAL_enableADCInts(HAL_Handle handle)
{
HAL_Obj *obj = (HAL_Obj *)handle;
// enable the PIE interrupts associated with the ADC interrupts
Interrupt_enable(INT_ADCC1); //RC4
// enable the ADC interrupts
ADC_enableInterrupt(obj->adcHandle[2], ADC_INT_NUMBER1);
// enable the cpu interrupt for ADC interrupts
Interrupt_enableInCPU(INTERRUPT_CPU_INT1);
return;
} // end of HAL_enableADCInts() function
void HAL_enableADCIntsToTriggerCLA(HAL_Handle handle)
{
HAL_Obj *obj = (HAL_Obj *)handle;
// enable the ADC interrupts
ADC_enableInterrupt(obj->adcHandle[2], ADC_INT_NUMBER1);
return;
} // end of HAL_enableADCIntsToTriggerCLA() function
void HAL_enableSCIInts(HAL_Handle handle)
{
HAL_Obj *obj = (HAL_Obj *)halHandle;
SCI_setFIFOInterruptLevel(obj->sciHandle[0], SCI_FIFO_TX0, SCI_FIFO_RX2);
SCI_enableInterrupt(obj->sciHandle[0], SCI_INT_RXFF);
//Interrupt_register(INT_SCIA_TX, sciaTxISR);
Interrupt_enable(INT_SCIA_RX);
//Interrupt_enable(INT_SCIA_TX);
Interrupt_clearACKGroup(INTERRUPT_ACK_GROUP9);
}
void HAL_enableDebugInt(HAL_Handle handle)
{
// enable debug events
ERTM;
return;
} // end of HAL_enableDebugInt() function
void HAL_enableDRV(HAL_MTR_Handle handle)
{
HAL_MTR_Obj *obj = (HAL_MTR_Obj *)handle;
DRV8320_enable(obj->drv8320Handle);
return;
} // end of HAL_enableDRV() function
void HAL_enableGlobalInts(HAL_Handle handle)
{
// enable global interrupts
Interrupt_enableMaster();
return;
} // end of HAL_enableGlobalInts() function
HAL_Handle HAL_init(void *pMemory,const size_t numBytes)
{
HAL_Handle handle;
HAL_Obj *obj;
if(numBytes < sizeof(HAL_Obj))
return((HAL_Handle)NULL);
// assign the handle
handle = (HAL_Handle)pMemory;
// assign the object
obj = (HAL_Obj *)handle;
// disable watchdog
SysCtl_disableWatchdog();
// initialize the ADC handles
obj->adcHandle[0] = ADCA_BASE;
obj->adcHandle[1] = ADCB_BASE;
obj->adcHandle[2] = ADCC_BASE;
// initialize the ADC results
obj->adcResult[0] = ADCARESULT_BASE;
obj->adcResult[1] = ADCBRESULT_BASE;
obj->adcResult[2] = ADCCRESULT_BASE;
// initialize CLA handle
obj->claHandle = CLA1_BASE;
// initialize SCI handle
obj->sciHandle[0] = SCIA_BASE; //!< the SCIA handle
obj->sciHandle[1] = SCIB_BASE; //!< the SCIB handle
// initialize DMA handle
obj->dmaHandle = DMA_BASE; //!< the DMA handle
// initialize DMA channel handle
obj->dmaChHandle[0] = DMA_CH1_BASE; //!< the DMA Channel handle
obj->dmaChHandle[1] = DMA_CH2_BASE; //!< the DMA Channel handle
obj->dmaChHandle[2] = DMA_CH3_BASE; //!< the DMA Channel handle
obj->dmaChHandle[3] = DMA_CH4_BASE; //!< the DMA Channel handle
// initialize timer handles
obj->timerHandle[0] = CPUTIMER0_BASE;
obj->timerHandle[1] = CPUTIMER1_BASE;
obj->timerHandle[2] = CPUTIMER2_BASE;
// initialize pwmdac handles
obj->pwmDACHandle[0] = EPWM7_BASE;
obj->pwmDACHandle[1] = EPWM7_BASE;
obj->pwmDACHandle[2] = EPWM8_BASE;
obj->pwmDACHandle[3] = EPWM8_BASE;
return(handle);
} // end of HAL_init() function
HAL_MTR_Handle HAL_MTR_init(void *pMemory,
const size_t numBytes,
const HAL_MotorNum_e motorNum)
{
HAL_MTR_Handle handle;
HAL_MTR_Obj *obj;
if(numBytes < sizeof(HAL_Obj))
{
return((HAL_MTR_Handle)NULL);
}
// assign the handle
handle = (HAL_MTR_Handle)pMemory;
// assign the object
obj = (HAL_MTR_Obj *)handle;
if(motorNum == HAL_MTR_1)
{
// initialize SPI handle
obj->spiHandle = SPIA_BASE; //!< the SPIA handle
// initialize PWM handles for Motor 1
obj->pwmHandle[0] = EPWM6_BASE; //!< the PWM handle
obj->pwmHandle[1] = EPWM5_BASE; //!< the PWM handle
obj->pwmHandle[2] = EPWM3_BASE; //!< the PWM handle
// initialize PGA handle
obj->pgaHandle[0] = PGA5_BASE; //!< the PGA handle
obj->pgaHandle[1] = PGA3_BASE; //!< the PGA handle
obj->pgaHandle[2] = PGA1_BASE; //!< the PGA handle
// initialize CMPSS handle
obj->cmpssHandle[0] = CMPSS5_BASE; //!< the CMPSS handle
obj->cmpssHandle[1] = CMPSS3_BASE; //!< the CMPSS handle
obj->cmpssHandle[2] = CMPSS1_BASE; //!< the CMPSS handle
// initialize DAC handle
obj->dacHandle = DACB_BASE; //!< the DAC handle
// initialize drv8320 interface
obj->drv8320Handle = DRV8320_init(&obj->drv8320);
// initialize QEP driver
obj->qepHandle = EQEP1_BASE;
}
else if(motorNum == HAL_MTR_2)
{
// initialize SPI handle
obj->spiHandle = SPIB_BASE; //!< the SPIB handle
// initialize PWM handles for Motor 1
obj->pwmHandle[0] = EPWM1_BASE; //!< the PWM handle
obj->pwmHandle[1] = EPWM4_BASE; //!< the PWM handle
obj->pwmHandle[2] = EPWM2_BASE; //!< the PWM handle
// initialize PGA handle
obj->pgaHandle[0] = PGA2_BASE; //!< the PGA handle
obj->pgaHandle[1] = PGA6_BASE; //!< the PGA handle
obj->pgaHandle[2] = PGA4_BASE; //!< the PGA handle
// initialize CMPSS handle
obj->cmpssHandle[0] = CMPSS2_BASE; //!< the CMPSS handle
obj->cmpssHandle[1] = CMPSS6_BASE; //!< the CMPSS handle
obj->cmpssHandle[2] = CMPSS4_BASE; //!< the CMPSS handle
obj->dacHandle = DACA_BASE; //!< the DAC handle
// initialize drv8320 interface
obj->drv8320Handle = DRV8320_init(&obj->drv8320);
// initialize QEP driver
obj->qepHandle = EQEP2_BASE;
}
return(handle);
} // end of HAL_init() function
void HAL_setParams(HAL_Handle handle)
{
// disable global interrupts
Interrupt_disableMaster();
// Disable the watchdog
SysCtl_disableWatchdog();
#ifdef _FLASH
//
// Copy time critical code and flash setup code to RAM. This includes the
// following functions: InitFlash();
//
// The RamfuncsLoadStart, RamfuncsLoadSize, and RamfuncsRunStart symbols
// are created by the linker. Refer to the device .cmd file.
//
memcpy(&RamfuncsRunStart, &RamfuncsLoadStart, (size_t)&RamfuncsLoadSize);
#endif
// Disable DC-DC controller
ASysCtl_disableDCDC();
// Enable temperature sensor
ASysCtl_enableTemperatureSensor();
// initialize the interrupt controller
Interrupt_initModule();
// init vector table
Interrupt_initVectorTable();
// Set up PLL control and clock dividers
// PLLSYSCLK = 20MHz (XTAL_OSC) * 10 (IMULT) * 1 (FMULT) / 2 (PLLCLK_BY_2)
SysCtl_setClock(SYSCTL_OSCSRC_XTAL |
SYSCTL_IMULT(10) |
SYSCTL_FMULT_NONE |
SYSCTL_SYSDIV(2) |
SYSCTL_PLL_ENABLE);
// These asserts will check that the #defines for the clock rates in
// device.h match the actual rates that have been configured. If they do
// not match, check that the calculations of DEVICE_SYSCLK_FREQ and
// DEVICE_LSPCLK_FREQ are accurate. Some examples will not perform as
// expected if these are not correct.
//
ASSERT(SysCtl_getClock(DEVICE_OSCSRC_FREQ) == DEVICE_SYSCLK_FREQ);
ASSERT(SysCtl_getLowSpeedClock(DEVICE_OSCSRC_FREQ) == DEVICE_LSPCLK_FREQ);
// run the device calibration
HAL_cal(handle);
// setup the peripheral clocks
HAL_setupPeripheralClks(handle);
#ifdef CLA
// setup CLA
HAL_setupCLA(handle);
#endif
// setup the GPIOs
HAL_setupGPIOs(handle);
#ifdef _FLASH
//
// Call Flash Initialization to setup flash waitstates. This function must
// reside in RAM.
Flash_initModule(FLASH0CTRL_BASE, FLASH0ECC_BASE, DEVICE_FLASH_WAITSTATES);
#endif
#ifdef PWMDAC_ENABLE
// setup the PWM DACs
HAL_setupPWMDACs(handle, USER_SYSTEM_FREQ_MHz);
#endif
// setup the ADCs
HAL_setupADCs(handle);
// setup the timers
HAL_setupTimers(handle, USER_SYSTEM_FREQ_MHz);
// setup the sci
#ifdef COMM_SCI
HAL_setupSCIA(handle);
#endif
return;
} // end of HAL_setParams() function
void HAL_MTR_setParams(HAL_MTR_Handle handle,
const HAL_MotorNum_e motorNum)
{
if(motorNum == HAL_MTR_1)
{
HAL_setNumCurrentSensors(handle,USER_M1_NUM_CURRENT_SENSORS);
HAL_setNumVoltageSensors(handle,USER_M1_NUM_VOLTAGE_SENSORS);
// set the current scale factor
HAL_setCurrentScaleFactor(handle,USER_M1_CURRENT_SF);
// set the voltage scale factor
HAL_setVoltageScaleFactor(handle,USER_M1_VOLTAGE_SF);
}
else if(motorNum == HAL_MTR_2)
{
HAL_setNumCurrentSensors(handle,USER_M2_NUM_CURRENT_SENSORS);
HAL_setNumVoltageSensors(handle,USER_M2_NUM_VOLTAGE_SENSORS);
// set the current scale factor
HAL_setCurrentScaleFactor(handle,USER_M2_CURRENT_SF);
// set the voltage scale factor
HAL_setVoltageScaleFactor(handle,USER_M2_VOLTAGE_SF);
}
// setup the PWMs
HAL_setupPWMs(handle, motorNum);
// setup the PGAs
HAL_setupPGAs(handle, motorNum);
// setup the Dacs
HAL_setupDACs(handle, motorNum);
// setup the CMPSSs
HAL_setupCMPSSs(handle, motorNum);
// setup the SPI for DRV8320_Kit_RevD
HAL_setupSPI(handle);
// setup the drv8320 interface
HAL_setupGate(handle, motorNum);
// setup the EQEP
HAL_setupQEP(handle);
return;
} // end of HAL_MTR_setParams() function
void HAL_setupADCs(HAL_Handle handle)
{
HAL_Obj *obj = (HAL_Obj *)handle;
SysCtl_delay(100U);
ADC_setVREF(obj->adcHandle[2], ADC_REFERENCE_INTERNAL, ADC_REFERENCE_3_3V);
ADC_setVREF(obj->adcHandle[1], ADC_REFERENCE_INTERNAL, ADC_REFERENCE_3_3V);
ADC_setVREF(obj->adcHandle[0], ADC_REFERENCE_INTERNAL, ADC_REFERENCE_3_3V);
SysCtl_delay(100U);
// Configure internal reference as 1.65*2 = 3.3
ASysCtl_setAnalogReference1P65(ASYSCTL_VREFHIA |
ASYSCTL_VREFHIB |
ASYSCTL_VREFHIC);
// Enable internal voltage reference
ASysCtl_setAnalogReferenceInternal(ASYSCTL_VREFHIA |
ASYSCTL_VREFHIB |
ASYSCTL_VREFHIC);
// Set main clock scaling factor (50MHz max clock for the ADC module)
ADC_setPrescaler(obj->adcHandle[0], ADC_CLK_DIV_2_0);
ADC_setPrescaler(obj->adcHandle[1], ADC_CLK_DIV_2_0);
ADC_setPrescaler(obj->adcHandle[2], ADC_CLK_DIV_2_0);
// set the ADC interrupt pulse generation to end of conversion
ADC_setInterruptPulseMode(obj->adcHandle[0], ADC_PULSE_END_OF_CONV);
ADC_setInterruptPulseMode(obj->adcHandle[1], ADC_PULSE_END_OF_CONV);
ADC_setInterruptPulseMode(obj->adcHandle[2], ADC_PULSE_END_OF_CONV);
// enable the ADCs
ADC_enableConverter(obj->adcHandle[0]);
ADC_enableConverter(obj->adcHandle[1]);
ADC_enableConverter(obj->adcHandle[2]);
// set priority of SOCs
ADC_setSOCPriority(obj->adcHandle[0], ADC_PRI_ALL_HIPRI);
ADC_setSOCPriority(obj->adcHandle[1], ADC_PRI_ALL_HIPRI);
ADC_setSOCPriority(obj->adcHandle[2], ADC_PRI_ALL_HIPRI);
// delay to allow ADCs to power up
SysCtl_delay(1000U);
// configure the interrupt sources
ADC_setInterruptSource(obj->adcHandle[2], ADC_INT_NUMBER1, ADC_SOC_NUMBER4); // trigger on last SOC_Number of last ADC-Group (here ADC_C SOC_NUMBER4)
// configure the SOCs for MTR1 on J1-J3/J2-J4
ADC_setupSOC(obj->adcHandle[0], ADC_SOC_NUMBER0, ADC_TRIGGER_EPWM6_SOCA, ADC_CH_ADCIN14, 14); // I_A = PGA5_OUT -> A14
ADC_setupSOC(obj->adcHandle[2], ADC_SOC_NUMBER0, ADC_TRIGGER_EPWM6_SOCA, ADC_CH_ADCIN7, 14); // I_B = PGA3_OUT -> B10/C7
ADC_setupSOC(obj->adcHandle[1], ADC_SOC_NUMBER0, ADC_TRIGGER_EPWM6_SOCA, ADC_CH_ADCIN7, 14); // I_C = PGA1_OUT -> A11/B7
ADC_setupSOC(obj->adcHandle[0], ADC_SOC_NUMBER1, ADC_TRIGGER_EPWM6_SOCA, ADC_CH_ADCIN5, 14); // V_A = A5
ADC_setupSOC(obj->adcHandle[1], ADC_SOC_NUMBER1, ADC_TRIGGER_EPWM6_SOCA, ADC_CH_ADCIN0, 14); // V_B = B0
ADC_setupSOC(obj->adcHandle[2], ADC_SOC_NUMBER1, ADC_TRIGGER_EPWM6_SOCA, ADC_CH_ADCIN2, 14); // V_C = C2
ADC_setupSOC(obj->adcHandle[1], ADC_SOC_NUMBER2, ADC_TRIGGER_EPWM6_SOCA, ADC_CH_ADCIN1, 14); // V_DC = B1. hvkit board has capacitor on Vbus feedback, so the sampling doesn't need to be very long to get an accurate value
// configure the SOCs for MTR2 on J5-J7/J6-J8
ADC_setupSOC(obj->adcHandle[1], ADC_SOC_NUMBER3, ADC_TRIGGER_EPWM1_SOCA, ADC_CH_ADCIN9, 14); // I_A = PGA2_OUT -> A12/B9
ADC_setupSOC(obj->adcHandle[0], ADC_SOC_NUMBER2, ADC_TRIGGER_EPWM1_SOCA, ADC_CH_ADCIN15, 14); // I_B = PGA6_OUT -> A15
ADC_setupSOC(obj->adcHandle[2], ADC_SOC_NUMBER2, ADC_TRIGGER_EPWM1_SOCA, ADC_CH_ADCIN9, 14); // I_C = PGA4_OUT -> B11/C9
ADC_setupSOC(obj->adcHandle[0], ADC_SOC_NUMBER3, ADC_TRIGGER_EPWM1_SOCA, ADC_CH_ADCIN6, 14); // V_A = A6
ADC_setupSOC(obj->adcHandle[1], ADC_SOC_NUMBER4, ADC_TRIGGER_EPWM1_SOCA, ADC_CH_ADCIN6, 14); // V_B = B6
ADC_setupSOC(obj->adcHandle[2], ADC_SOC_NUMBER3, ADC_TRIGGER_EPWM1_SOCA, ADC_CH_ADCIN14, 14); // V_C = C14
ADC_setupSOC(obj->adcHandle[2], ADC_SOC_NUMBER4, ADC_TRIGGER_EPWM1_SOCA, ADC_CH_ADCIN1, 14); // V_DC = C1. hvkit board has capacitor on Vbus feedback, so the sampling doesn't need to be very long to get an accurate value
return;
} // end of HAL_setupADCs() function
void HAL_runADCZeroOffsetCalibration(uint32_t base)
{
uint16_t AdcOffsetMean;
uint32_t Sum;
uint16_t index,SampleSize;
// Adc Zero Offset Calibration
// This is not typically necessary
// to achieve datasheet specified performance
ADC_setupSOC(base, ADC_SOC_NUMBER0, ADC_TRIGGER_SW_ONLY, ADC_CH_ADCIN13, 10);
ADC_setupSOC(base, ADC_SOC_NUMBER1, ADC_TRIGGER_SW_ONLY, ADC_CH_ADCIN13, 10);
ADC_setupSOC(base, ADC_SOC_NUMBER2, ADC_TRIGGER_SW_ONLY, ADC_CH_ADCIN13, 10);
ADC_setupSOC(base, ADC_SOC_NUMBER3, ADC_TRIGGER_SW_ONLY, ADC_CH_ADCIN13, 10);
ADC_setupSOC(base, ADC_SOC_NUMBER4, ADC_TRIGGER_SW_ONLY, ADC_CH_ADCIN13, 10);
ADC_setupSOC(base, ADC_SOC_NUMBER5, ADC_TRIGGER_SW_ONLY, ADC_CH_ADCIN13, 10);
ADC_setupSOC(base, ADC_SOC_NUMBER6, ADC_TRIGGER_SW_ONLY, ADC_CH_ADCIN13, 10);
ADC_setupSOC(base, ADC_SOC_NUMBER7, ADC_TRIGGER_SW_ONLY, ADC_CH_ADCIN13, 10);
EALLOW;
HWREGH(base + ADC_O_OFFTRIM) = 96;
EDIS;
//
// Set SOC1 to set the interrupt 1 flag. Enable the interrupt and make
// sure its flag is cleared.
//
ADC_setInterruptSource(base, ADC_INT_NUMBER1, ADC_SOC_NUMBER7);
ADC_enableInterrupt(base, ADC_INT_NUMBER1);
ADC_clearInterruptStatus(base, ADC_INT_NUMBER1);
AdcOffsetMean=0;
Sum=0;
index=0;
SampleSize=512;
while( index < SampleSize)
{
ADC_forceSOC(base, ADC_SOC_NUMBER0);
ADC_forceSOC(base, ADC_SOC_NUMBER1);
ADC_forceSOC(base, ADC_SOC_NUMBER2);
ADC_forceSOC(base, ADC_SOC_NUMBER3);
ADC_forceSOC(base, ADC_SOC_NUMBER4);
ADC_forceSOC(base, ADC_SOC_NUMBER5);
ADC_forceSOC(base, ADC_SOC_NUMBER6);
ADC_forceSOC(base, ADC_SOC_NUMBER7);
SysCtl_delay(2000U);
while(ADC_getInterruptStatus(base, ADC_INT_NUMBER1) == false)
{
}
SysCtl_delay(100U);
Sum += ADC_readResult(base, ADC_SOC_NUMBER0);
Sum += ADC_readResult(base, ADC_SOC_NUMBER1);
Sum += ADC_readResult(base, ADC_SOC_NUMBER2);
Sum += ADC_readResult(base, ADC_SOC_NUMBER3);
Sum += ADC_readResult(base, ADC_SOC_NUMBER4);
Sum += ADC_readResult(base, ADC_SOC_NUMBER5);
Sum += ADC_readResult(base, ADC_SOC_NUMBER6);
Sum += ADC_readResult(base, ADC_SOC_NUMBER7);
index += 8;
ADC_clearInterruptStatus(base, ADC_INT_NUMBER1);
}
ADC_clearInterruptStatus(base, ADC_INT_NUMBER1);
//Calculate average ADC sample value
AdcOffsetMean = Sum / SampleSize;
// delay to allow ADCs to power up
SysCtl_delay(100U);
EALLOW;
HWREGH(base + ADC_O_OFFTRIM) = 96-AdcOffsetMean;
EDIS;
// delay to allow ADCs to power up
SysCtl_delay(100U);
return;
}
void HAL_setupPGAs(HAL_MTR_Handle handle, const HAL_MotorNum_e motorNum)
{
HAL_MTR_Obj *obj = (HAL_MTR_Obj *)handle;
uint16_t cnt;
uint16_t pgaGain = PGA_GAIN_12;
if(motorNum == HAL_MTR_1)
pgaGain = MTR_1_PGA_GAIN;
else if(motorNum == HAL_MTR_2)
pgaGain = MTR_2_PGA_GAIN;
// For Motor_1/Motor_2
for(cnt=0;cnt<3;cnt++)
{
// Set a gain of 12 to PGA1/3/5 (MTR1) or PGA2/4/6 (MTR2)
PGA_setGain(obj->pgaHandle[cnt], (PGA_GainValue)pgaGain);
// No filter resistor for output
PGA_setFilterResistor(obj->pgaHandle[cnt], PGA_LOW_PASS_FILTER_DISABLED);
// Enable PGA1/3/5 (MTR1) or PGA2/4/6 (MTR2)
PGA_enable(obj->pgaHandle[cnt]);
}
return;
} // end of HAL_setupPGAs() function
// HAL_setupCMPSSs
void HAL_setupCMPSSs(HAL_MTR_Handle handle, const HAL_MotorNum_e motorNum)
{
HAL_MTR_Obj *obj = (HAL_MTR_Obj *)handle;
uint16_t cnt;
// Set the initial value to half of ADC range
uint16_t cmpsaDACH = 2048;
uint16_t cmpsaDACL = 2048;
//
// Refer to the Table 9-2 in Chapter 9 of TMS320F28004x
// Technical Reference Manual (SPRUI33B), to configure the ePWM X-Bar
//
if(motorNum == HAL_MTR_1)
{
cmpsaDACH = MTR_1_CMPSS_DACH_VALUE;
cmpsaDACL = MTR_1_CMPSS_DACL_VALUE;
ASysCtl_selectCMPHPMux(ASYSCTL_CMPHPMUX_SELECT_1, 4);
ASysCtl_selectCMPLPMux(ASYSCTL_CMPLPMUX_SELECT_1, 4);
ASysCtl_selectCMPHPMux(ASYSCTL_CMPHPMUX_SELECT_3, 4);
ASysCtl_selectCMPLPMux(ASYSCTL_CMPLPMUX_SELECT_3, 4);
ASysCtl_selectCMPHPMux(ASYSCTL_CMPHPMUX_SELECT_5, 4);
ASysCtl_selectCMPLPMux(ASYSCTL_CMPLPMUX_SELECT_5, 4);
// Configure TRIP9 to be CTRIP1H and CTRIP1L using the ePWM X-BAR
XBAR_setEPWMMuxConfig(XBAR_TRIP9, XBAR_EPWM_MUX08_CMPSS5_CTRIPH_OR_L);
XBAR_enableEPWMMux(XBAR_TRIP9, XBAR_MUX08);
// Configure TRIP7 to be CTRIP1H and CTRIP1L using the ePWM X-BAR
XBAR_setEPWMMuxConfig(XBAR_TRIP7, XBAR_EPWM_MUX00_CMPSS1_CTRIPH_OR_L);
XBAR_enableEPWMMux(XBAR_TRIP7, XBAR_MUX00);
// Configure TRIP8 to be CTRIP1H and CTRIP1L using the ePWM X-BAR
XBAR_setEPWMMuxConfig(XBAR_TRIP8, XBAR_EPWM_MUX04_CMPSS3_CTRIPH_OR_L);
XBAR_enableEPWMMux(XBAR_TRIP8, XBAR_MUX04);
}
else if(motorNum == HAL_MTR_2)
{
cmpsaDACH = MTR_2_CMPSS_DACH_VALUE;
cmpsaDACL = MTR_2_CMPSS_DACL_VALUE;
ASysCtl_selectCMPHPMux(ASYSCTL_CMPHPMUX_SELECT_2, 4);
ASysCtl_selectCMPLPMux(ASYSCTL_CMPLPMUX_SELECT_2, 4);
ASysCtl_selectCMPHPMux(ASYSCTL_CMPHPMUX_SELECT_4, 4);
ASysCtl_selectCMPLPMux(ASYSCTL_CMPLPMUX_SELECT_4, 4);
ASysCtl_selectCMPHPMux(ASYSCTL_CMPHPMUX_SELECT_6, 4);
ASysCtl_selectCMPLPMux(ASYSCTL_CMPLPMUX_SELECT_6, 4);
// Configure TRIP11 to be CTRIP1H and CTRIP1L using the ePWM X-BAR
XBAR_setEPWMMuxConfig(XBAR_TRIP11, XBAR_EPWM_MUX06_CMPSS4_CTRIPH_OR_L);
XBAR_enableEPWMMux(XBAR_TRIP11, XBAR_MUX06);
// Configure TRIP10 to be CTRIP1H and CTRIP1L using the ePWM X-BAR
XBAR_setEPWMMuxConfig(XBAR_TRIP10, XBAR_EPWM_MUX02_CMPSS2_CTRIPH_OR_L);
XBAR_enableEPWMMux(XBAR_TRIP10, XBAR_MUX02);
// Configure TRIP12 to be CTRIP1H and CTRIP1L using the ePWM X-BAR
XBAR_setEPWMMuxConfig(XBAR_TRIP8, XBAR_EPWM_MUX10_CMPSS6_CTRIPH_OR_L);
XBAR_enableEPWMMux(XBAR_TRIP12, XBAR_MUX10);
}
for(cnt=0;cnt<3;cnt++)
{
// Enable CMPSS and configure the negative input signal to come from the DAC
CMPSS_enableModule(obj->cmpssHandle[cnt]);
CMPSS_configHighComparator(obj->cmpssHandle[cnt], CMPSS_INSRC_DAC);
CMPSS_configLowComparator(obj->cmpssHandle[cnt], CMPSS_INSRC_DAC);
// Use VDDA as the reference for the DAC and set DAC value to midpoint for
// arbitrary reference
CMPSS_configDAC(obj->cmpssHandle[cnt], CMPSS_DACREF_VDDA | CMPSS_DACVAL_SYSCLK |
CMPSS_DACSRC_SHDW);
CMPSS_setDACValueHigh(obj->cmpssHandle[cnt], cmpsaDACH);
CMPSS_setDACValueLow(obj->cmpssHandle[cnt], cmpsaDACL);
// Configure digital filter. For this example, the maxiumum values will be
// used for the clock prescale, sample window size, and threshold.
CMPSS_configFilterHigh(obj->cmpssHandle[cnt], 0x004, 3, 2);
CMPSS_configFilterLow(obj->cmpssHandle[cnt], 0x004, 3, 2);
// Initialize the filter logic and start filtering
CMPSS_initFilterHigh(obj->cmpssHandle[cnt]);
CMPSS_initFilterLow(obj->cmpssHandle[cnt]);
// Configure the output signals. Both CTRIPH and CTRIPOUTH will be fed by
// the asynchronous comparator output. CMPSS_INV_INVERTED |
CMPSS_configOutputsHigh(obj->cmpssHandle[cnt],
CMPSS_TRIP_FILTER |
CMPSS_TRIPOUT_FILTER |
CMPSS_OR_ASYNC_OUT_W_FILT);
CMPSS_configOutputsLow(obj->cmpssHandle[cnt],
CMPSS_TRIP_FILTER |
CMPSS_TRIPOUT_FILTER |
CMPSS_INV_INVERTED);
// Clear any high comparator digital filter output latch
CMPSS_clearFilterLatchHigh(obj->cmpssHandle[cnt]);
// Clear any low comparator digital filter output latch
CMPSS_clearFilterLatchLow(obj->cmpssHandle[cnt]);
}
return;
} // end of HAL_setupCMPSSs() function
void HAL_setupDACs(HAL_MTR_Handle handle, const HAL_MotorNum_e motorNum)
{
HAL_MTR_Obj *obj = (HAL_MTR_Obj *)handle;
// Set the initial value to half of ADC range for 1.65V output
uint16_t dacValue = 2048;
if(motorNum == HAL_MTR_1)
dacValue = MTR_1_DAC_VALUE;
else if(motorNum == HAL_MTR_2)
dacValue = MTR_2_DAC_VALUE;
// Set the DAC gain to 1/2
DAC_setGainMode(obj->dacHandle, DAC_GAIN_TWO);
// Use ADC voltage reference
DAC_setReferenceVoltage(obj->dacHandle, DAC_REF_ADC_VREFHI);
// Load count value for DAC on next SYSCLK
DAC_setLoadMode(obj->dacHandle, DAC_LOAD_SYSCLK);
// Enable DAC output
DAC_enableOutput(obj->dacHandle);
// Set the DAC Shadow Output Value
DAC_setShadowValue(obj->dacHandle, dacValue);
return;
} // end of HAL_setupDACs() function
void HAL_writeDRVData(HAL_MTR_Handle handle, DRV8320_SPIVars_t *drv8320SPIVars)
{
HAL_MTR_Obj *obj = (HAL_MTR_Obj *)handle;
DRV8320_writeData(obj->drv8320Handle,drv8320SPIVars);
return;
} // end of HAL_writeDRVData() function
void HAL_readDRVData(HAL_MTR_Handle handle, DRV8320_SPIVars_t *drv8320SPIVars)
{
HAL_MTR_Obj *obj = (HAL_MTR_Obj *)handle;
DRV8320_readData(obj->drv8320Handle,drv8320SPIVars);
return;
} // end of HAL_readDRVData() function
void HAL_setupDRVSPI(HAL_MTR_Handle handle, DRV8320_SPIVars_t *drv8320SPIVars)
{
HAL_MTR_Obj *obj = (HAL_MTR_Obj *)handle;
DRV8320_setupSPI(obj->drv8320Handle,drv8320SPIVars);
return;
} // end of HAL_setupDRVSPI() function
void HAL_setupFaults(HAL_MTR_Handle handle, const HAL_MotorNum_e motorNum)
{
HAL_MTR_Obj *obj = (HAL_MTR_Obj *)handle;
uint16_t cnt;
XBAR_InputNum xbarInput;
uint16_t xbarGpio;
uint16_t tzSignal;
uint16_t dcTripIn;
if(motorNum == HAL_MTR_1)
{
xbarInput = MTR_1_XBAR_IMPUT; // XBAR_INPUT2
xbarGpio = M1_HAL_PM_nFAULT_GPIO; // GPIO40
tzSignal = MTR_1_TZ_SIGNAL; // EPWM_TZ_SIGNAL_OSHT2
dcTripIn = MTR_1_DCTRIPIN; // TRIPIN7/8/9
}
else if(motorNum == HAL_MTR_2)
{
xbarInput = MTR_2_XBAR_IMPUT; // XBAR_INPUT3
xbarGpio = M2_HAL_PM_nFAULT_GPIO; // GPIO29
tzSignal = MTR_2_TZ_SIGNAL; // EPWM_TZ_SIGNAL_OSHT3
dcTripIn = MTR_2_DCTRIPIN; // TRIPIN10/11/12
}
// Configure Trip Mechanism for the Motor control software
// -Cycle by cycle trip on CPU halt
// -One shot fault trip zone
// These trips need to be repeated for EPWM1 ,2 & 3
// configure the input x bar for TZ2 to GPIO, where Over Current is connected
XBAR_setInputPin(xbarInput, xbarGpio);
XBAR_lockInput(xbarInput);
for(cnt=0;cnt<3;cnt++)
{
EPWM_enableTripZoneSignals(obj->pwmHandle[cnt],
EPWM_TZ_SIGNAL_CBC6);
EPWM_enableTripZoneSignals(obj->pwmHandle[cnt],
tzSignal);
//enable DC TRIP combinational input
EPWM_enableDigitalCompareTripCombinationInput(obj->pwmHandle[cnt],
dcTripIn, EPWM_DC_TYPE_DCAH);
EPWM_enableDigitalCompareTripCombinationInput(obj->pwmHandle[cnt],
dcTripIn, EPWM_DC_TYPE_DCAL);
EPWM_enableDigitalCompareTripCombinationInput(obj->pwmHandle[cnt],
dcTripIn, EPWM_DC_TYPE_DCBH);
EPWM_enableDigitalCompareTripCombinationInput(obj->pwmHandle[cnt],
dcTripIn, EPWM_DC_TYPE_DCBL);
// Trigger event when DCAH is High
EPWM_setTripZoneDigitalCompareEventCondition(obj->pwmHandle[cnt],
EPWM_TZ_DC_OUTPUT_A1,
EPWM_TZ_EVENT_DCXH_HIGH);
// Trigger event when DCBH is High
EPWM_setTripZoneDigitalCompareEventCondition(obj->pwmHandle[cnt],
EPWM_TZ_DC_OUTPUT_B1,
EPWM_TZ_EVENT_DCXL_HIGH);
// Enable DCA as OST
EPWM_enableTripZoneSignals(obj->pwmHandle[cnt], EPWM_TZ_SIGNAL_DCAEVT1);
// Enable DCB as OST
EPWM_enableTripZoneSignals(obj->pwmHandle[cnt], EPWM_TZ_SIGNAL_DCBEVT1);
// Configure the DCA path to be un-filtered and asynchronous
EPWM_setDigitalCompareEventSource(obj->pwmHandle[cnt],
EPWM_DC_MODULE_A,
EPWM_DC_EVENT_1,
EPWM_DC_EVENT_SOURCE_FILT_SIGNAL);
// Configure the DCB path to be un-filtered and asynchronous
EPWM_setDigitalCompareEventSource(obj->pwmHandle[cnt],
EPWM_DC_MODULE_B,
EPWM_DC_EVENT_1,
EPWM_DC_EVENT_SOURCE_FILT_SIGNAL);
// What do we want the OST/CBC events to do?
// TZA events can force EPWMxA
// TZB events can force EPWMxB
EPWM_setTripZoneAction(obj->pwmHandle[cnt],
EPWM_TZ_ACTION_EVENT_TZA,
EPWM_TZ_ACTION_LOW);
EPWM_setTripZoneAction(obj->pwmHandle[cnt],
EPWM_TZ_ACTION_EVENT_TZB,
EPWM_TZ_ACTION_LOW);
// Clear any spurious fault
EPWM_clearTripZoneFlag(obj->pwmHandle[cnt],
HAL_TZ_INTERRUPT_ALL);
}
return;
} // end of HAL_setupFaults() function
void HAL_setupGate(HAL_MTR_Handle handle, const HAL_MotorNum_e motorNum)
{
HAL_MTR_Obj *obj = (HAL_MTR_Obj *)handle;
DRV8320_setSPIHandle(obj->drv8320Handle,obj->spiHandle);
if(motorNum == HAL_MTR_1)
{
DRV8320_setGPIOCSNumber(obj->drv8320Handle,M1_HAL_DRV_SPI_CS_GPIO);
DRV8320_setGPIONumber(obj->drv8320Handle,M1_HAL_DRV_EN_GATE_GPIO);
}
else if(motorNum == HAL_MTR_2)
{
DRV8320_setGPIOCSNumber(obj->drv8320Handle,M2_HAL_DRV_SPI_CS_GPIO);
DRV8320_setGPIONumber(obj->drv8320Handle,M2_HAL_DRV_EN_GATE_GPIO);
}
return;
} // HAL_setupGate() function
void HAL_setupGPIOs(HAL_Handle handle)
{
// EPWM1A->UH for J5-J7/J6-J8 Connection
GPIO_setMasterCore(0, GPIO_CORE_CPU1);
GPIO_setPinConfig(GPIO_0_EPWM1A);
GPIO_setDirectionMode(0, GPIO_DIR_MODE_OUT);
GPIO_setPadConfig(0, GPIO_PIN_TYPE_STD);
// EPWM1B->UL for J5-J7/J6-J8 Connection
GPIO_setMasterCore(1, GPIO_CORE_CPU1);
GPIO_setPinConfig(GPIO_1_EPWM1B);
GPIO_setDirectionMode(1, GPIO_DIR_MODE_OUT);
GPIO_setPadConfig(1, GPIO_PIN_TYPE_STD);
// EPWM2A->WH for J5-J7/J6-J8 Connection
GPIO_setMasterCore(2, GPIO_CORE_CPU1);
GPIO_setPinConfig(GPIO_2_EPWM2A);
GPIO_setDirectionMode(2, GPIO_DIR_MODE_OUT);
GPIO_setPadConfig(2, GPIO_PIN_TYPE_STD);
// EPWM2B->WL for J5-J7/J6-J8 Connection
GPIO_setMasterCore(3, GPIO_CORE_CPU1);
GPIO_setPinConfig(GPIO_3_EPWM2B);
GPIO_setDirectionMode(3, GPIO_DIR_MODE_OUT);
GPIO_setPadConfig(3, GPIO_PIN_TYPE_STD);
// EPWM3A->WH for J1-J3/J2-J4 Connection
GPIO_setMasterCore(4, GPIO_CORE_CPU1);
GPIO_setPinConfig(GPIO_4_EPWM3A);
GPIO_setDirectionMode(4, GPIO_DIR_MODE_OUT);
GPIO_setPadConfig(4, GPIO_PIN_TYPE_STD);
// EPWM3B->WL for J1-J3/J2-J4 Connection
GPIO_setMasterCore(5, GPIO_CORE_CPU1);
GPIO_setPinConfig(GPIO_5_EPWM3B);
GPIO_setDirectionMode(5, GPIO_DIR_MODE_OUT);
GPIO_setPadConfig(5, GPIO_PIN_TYPE_STD);
// EPWM4A->VH for J5-J7/J6-J8 Connection
GPIO_setMasterCore(6, GPIO_CORE_CPU1);
GPIO_setPinConfig(GPIO_6_EPWM4A);
GPIO_setDirectionMode(6, GPIO_DIR_MODE_OUT);
GPIO_setPadConfig(6, GPIO_PIN_TYPE_STD);
// EPWM4B->VL for J5-J7/J6-J8 Connection
GPIO_setMasterCore(7, GPIO_CORE_CPU1);
GPIO_setPinConfig(GPIO_7_EPWM4B);
GPIO_setDirectionMode(7, GPIO_DIR_MODE_OUT);
GPIO_setPadConfig(7, GPIO_PIN_TYPE_STD);
// EPWM5A->VH for J1-J3/J2-J4 Connection
GPIO_setMasterCore(8, GPIO_CORE_CPU1);
GPIO_setPinConfig(GPIO_8_EPWM5A);
GPIO_setDirectionMode(8, GPIO_DIR_MODE_OUT);
GPIO_setPadConfig(8, GPIO_PIN_TYPE_STD);
// EPWM5B->VL for J1-J3/J2-J4 Connection
GPIO_setMasterCore(9, GPIO_CORE_CPU1);
GPIO_setPinConfig(GPIO_9_EPWM5B);
GPIO_setDirectionMode(9, GPIO_DIR_MODE_OUT);
GPIO_setPadConfig(9, GPIO_PIN_TYPE_STD);
// EPWM6A->UH for J1-J3/J2-J4 Connection
GPIO_setMasterCore(10, GPIO_CORE_CPU1);
GPIO_setPinConfig(GPIO_10_EPWM6A);
GPIO_setDirectionMode(10, GPIO_DIR_MODE_OUT);
GPIO_setPadConfig(10, GPIO_PIN_TYPE_STD);
// EPWM6B->UL for J1-J3/J2-J4 Connection
GPIO_setMasterCore(11, GPIO_CORE_CPU1);
GPIO_setPinConfig(GPIO_11_EPWM6B);
GPIO_setDirectionMode(11, GPIO_DIR_MODE_OUT);
GPIO_setPadConfig(11, GPIO_PIN_TYPE_STD);
// EPWM8B->PWM-DAC3
GPIO_setMasterCore(12, GPIO_CORE_CPU1);
GPIO_setPinConfig(GPIO_12_EPWM7A);
GPIO_setDirectionMode(12, GPIO_DIR_MODE_OUT);
GPIO_setPadConfig(12, GPIO_PIN_TYPE_STD);
// GPIO13->1-J3/J2-J4-DRV_EN
GPIO_setMasterCore(13, GPIO_CORE_CPU1);
GPIO_writePin(13, 1);
GPIO_setDirectionMode(13, GPIO_DIR_MODE_OUT);
GPIO_setPadConfig(13, GPIO_PIN_TYPE_PULLUP);
// EPWM8A->PWM-DAC1
GPIO_setMasterCore(14, GPIO_CORE_CPU1);
GPIO_setPinConfig(GPIO_14_EPWM8A);
GPIO_setDirectionMode(14, GPIO_DIR_MODE_OUT);
GPIO_setPadConfig(14, GPIO_PIN_TYPE_STD);
// EPWM8B->PWM-DAC2
GPIO_setMasterCore(15, GPIO_CORE_CPU1);
GPIO_setPinConfig(GPIO_15_EPWM8B);
GPIO_setDirectionMode(15, GPIO_DIR_MODE_OUT);
GPIO_setPadConfig(15, GPIO_PIN_TYPE_STD);
// GPIO16->SPIA-SDI for 1-J3/J2-J4 connection
GPIO_setMasterCore(16, GPIO_CORE_CPU1);
GPIO_setPinConfig(GPIO_16_SPISIMOA);
GPIO_setDirectionMode(16, GPIO_DIR_MODE_OUT);
GPIO_setPadConfig(16, GPIO_PIN_TYPE_STD);
// GPIO17->SPIA-SDO for 1-J3/J2-J4 connection
GPIO_setMasterCore(17, GPIO_CORE_CPU1);
GPIO_setPinConfig(GPIO_17_SPISOMIA);
GPIO_setDirectionMode(17, GPIO_DIR_MODE_IN);
GPIO_setPadConfig(17, GPIO_PIN_TYPE_STD);
// GPIO18->Reserve (N/A for GPIO)
GPIO_setMasterCore(18, GPIO_CORE_CPU1);
GPIO_setPinConfig(GPIO_18_GPIO18);
GPIO_setDirectionMode(18, GPIO_DIR_MODE_IN);
GPIO_setPadConfig(18, GPIO_PIN_TYPE_STD);
// GPIO22->SPIB-CLK for J5-J7/J6-J8 connection
GPIO_setAnalogMode(22, GPIO_ANALOG_DISABLED); // enable GPIO22 as GPIO. See Manual page 81
GPIO_setMasterCore(22, GPIO_CORE_CPU1);
GPIO_setPinConfig(GPIO_22_SPICLKB);
GPIO_setDirectionMode(22, GPIO_DIR_MODE_OUT);
GPIO_setPadConfig(22, GPIO_PIN_TYPE_STD);
// GPIO23->LaunchPad LED5
GPIO_setAnalogMode(23, GPIO_ANALOG_DISABLED); // enable GPIO23 as GPIO. See Manual page 81
GPIO_setMasterCore(23, GPIO_CORE_CPU1);
GPIO_setPinConfig(GPIO_23_GPIO23);
GPIO_writePin(23, 0);
GPIO_setDirectionMode(23, GPIO_DIR_MODE_OUT);
GPIO_setPadConfig(23, GPIO_PIN_TYPE_STD);
// GPIO24->SPIB-SDI for J5-J7/J6-J8 connection
GPIO_setMasterCore(24, GPIO_CORE_CPU1);
GPIO_setPinConfig(GPIO_24_SPISIMOB);
GPIO_setDirectionMode(24, GPIO_DIR_MODE_OUT);
GPIO_setPadConfig(24, GPIO_PIN_TYPE_STD);
// GPIO25->LED for J1/J2 connection
GPIO_setMasterCore(25, GPIO_CORE_CPU1);
GPIO_setPinConfig(GPIO_25_GPIO25);
GPIO_writePin(25, 0);
GPIO_setDirectionMode(25, GPIO_DIR_MODE_OUT);
GPIO_setPadConfig(25, GPIO_PIN_TYPE_STD);
// GPIO26->Reserve (N/A)
GPIO_setMasterCore(26, GPIO_CORE_CPU1);
GPIO_setPinConfig(GPIO_26_GPIO26);
GPIO_setDirectionMode(26, GPIO_DIR_MODE_IN);
GPIO_setPadConfig(26, GPIO_PIN_TYPE_STD);
// GPIO27->SPIB-CS for J5-J7/J6-J8 connection
GPIO_setMasterCore(27, GPIO_CORE_CPU1);
GPIO_setPinConfig(GPIO_27_SPISTEB);
GPIO_setDirectionMode(27, GPIO_DIR_MODE_OUT);
GPIO_setPadConfig(27, GPIO_PIN_TYPE_STD);
// GPIO28->DRV-EN for J5-J7/J6-J8 connection
GPIO_setMasterCore(28, GPIO_CORE_CPU1);
GPIO_setPinConfig(GPIO_28_GPIO28);
GPIO_writePin(28, 1);
GPIO_setDirectionMode(28, GPIO_DIR_MODE_OUT);
GPIO_setPadConfig(28, GPIO_PIN_TYPE_PULLUP);
// GPIO29->nFAULT for J5-J7/J6-J8 connection
GPIO_setMasterCore(29, GPIO_CORE_CPU1);
GPIO_setPinConfig(GPIO_29_GPIO29);
GPIO_setDirectionMode(29, GPIO_DIR_MODE_IN);
GPIO_setPadConfig(29, GPIO_PIN_TYPE_PULLUP);
// GPIO30->Reserve (N/A)
GPIO_setMasterCore(30, GPIO_CORE_CPU1);
GPIO_setPinConfig(GPIO_30_CANRXA);
GPIO_setDirectionMode(30, GPIO_DIR_MODE_IN);
GPIO_setPadConfig(30, GPIO_PIN_TYPE_PULLUP);
// GPIO31->SPIB-SDO for J5-J7/J6-J8 connection
GPIO_setMasterCore(31, GPIO_CORE_CPU1);
GPIO_setPinConfig(GPIO_31_SPISOMIB);
GPIO_setDirectionMode(31, GPIO_DIR_MODE_IN);
GPIO_setPadConfig(31, GPIO_PIN_TYPE_STD);
// GPIO32->LED for J5-J7/J6-J8 connection
GPIO_setMasterCore(32, GPIO_CORE_CPU1);
GPIO_setPinConfig(GPIO_32_GPIO32);
GPIO_writePin(32, 0);
GPIO_setDirectionMode(32, GPIO_DIR_MODE_OUT);
GPIO_setPadConfig(32, GPIO_PIN_TYPE_STD);
// GPIO33->Reserve (N/A)
GPIO_setMasterCore(33, GPIO_CORE_CPU1);
GPIO_setPinConfig(GPIO_33_GPIO33);
GPIO_setDirectionMode(33, GPIO_DIR_MODE_IN);
GPIO_setPadConfig(33, GPIO_PIN_TYPE_STD);
// GPIO34->LaunchPad LED5
GPIO_setMasterCore(34, GPIO_CORE_CPU1);
GPIO_setPinConfig(GPIO_34_GPIO34);
GPIO_writePin(34, 0);
GPIO_setDirectionMode(34, GPIO_DIR_MODE_OUT);
GPIO_setPadConfig(34, GPIO_PIN_TYPE_STD);
#ifdef COMM_SCI
// GPIO35 is the SCI Rx pin.
GPIO_setMasterCore(35, GPIO_CORE_CPU1);
GPIO_setPinConfig (GPIO_35_SCIRXDA);
GPIO_setDirectionMode(35, GPIO_DIR_MODE_IN);
GPIO_setPadConfig(35, GPIO_PIN_TYPE_STD);
GPIO_setQualificationMode(35, GPIO_QUAL_ASYNC);
// GPIO37 is the SCI Tx pin.
GPIO_setMasterCore(37, GPIO_CORE_CPU1);
GPIO_setPinConfig (GPIO_37_SCITXDA);
GPIO_setDirectionMode(37, GPIO_DIR_MODE_OUT);
GPIO_setPadConfig(37, GPIO_PIN_TYPE_STD);
GPIO_setQualificationMode(37, GPIO_QUAL_ASYNC);
#else
// TDI
GPIO_setMasterCore(35, GPIO_CORE_CPU1);
GPIO_setPinConfig(GPIO_35_TDI);
// TDO
GPIO_setMasterCore(37, GPIO_CORE_CPU1);
GPIO_setPinConfig(GPIO_37_TDO);
#endif
// GPIO39->Reserve (N/A)
GPIO_setMasterCore(39, GPIO_CORE_CPU1);
GPIO_setPinConfig(GPIO_39_GPIO39);
GPIO_setDirectionMode(39, GPIO_DIR_MODE_IN);
GPIO_setPadConfig(39, GPIO_PIN_TYPE_PULLUP);
// GPIO40->nFAULT for J1-J3/J2-J4 connection
GPIO_setMasterCore(40, GPIO_CORE_CPU1);
GPIO_setPinConfig(GPIO_40_GPIO40);
GPIO_setDirectionMode(40, GPIO_DIR_MODE_IN);
GPIO_setPadConfig(40, GPIO_PIN_TYPE_PULLUP);
// GPIO41->Reserve (N/A)
GPIO_setMasterCore(41, GPIO_CORE_CPU1);
GPIO_setPinConfig(GPIO_41_GPIO41);
GPIO_setDirectionMode(41, GPIO_DIR_MODE_IN);
GPIO_setPadConfig(41, GPIO_PIN_TYPE_STD);
// GPIO42->Reserve (N/A)
GPIO_setMasterCore(42, GPIO_CORE_CPU1);
GPIO_setPinConfig(GPIO_42_GPIO42);
GPIO_setDirectionMode(42, GPIO_DIR_MODE_IN);
GPIO_setPadConfig(42, GPIO_PIN_TYPE_STD);
// GPIO43->Reserve (N/A)
GPIO_setMasterCore(43, GPIO_CORE_CPU1);
GPIO_setPinConfig(GPIO_43_GPIO43);
GPIO_setDirectionMode(43, GPIO_DIR_MODE_IN);
GPIO_setPadConfig(43, GPIO_PIN_TYPE_STD);
// GPIO44->Reserve (N/A)
GPIO_setMasterCore(44, GPIO_CORE_CPU1);
GPIO_setPinConfig(GPIO_44_GPIO44);
GPIO_setDirectionMode(44, GPIO_DIR_MODE_IN);
GPIO_setPadConfig(44, GPIO_PIN_TYPE_STD);
// GPIO45->Reserve (N/A)
GPIO_setMasterCore(45, GPIO_CORE_CPU1);
GPIO_setPinConfig(GPIO_45_GPIO45);
GPIO_setDirectionMode(45, GPIO_DIR_MODE_IN);
GPIO_setPadConfig(45, GPIO_PIN_TYPE_STD);
// GPIO46->Reserve (N/A)
GPIO_setMasterCore(46, GPIO_CORE_CPU1);
GPIO_setPinConfig(GPIO_46_GPIO46);
GPIO_setDirectionMode(46, GPIO_DIR_MODE_IN);
GPIO_setPadConfig(46, GPIO_PIN_TYPE_STD);
// GPIO47->Reserve (N/A)
GPIO_setMasterCore(47, GPIO_CORE_CPU1);
GPIO_setPinConfig(GPIO_47_GPIO47);
GPIO_setDirectionMode(47, GPIO_DIR_MODE_IN);
GPIO_setPadConfig(47, GPIO_PIN_TYPE_STD);
// GPIO48->Reserve (N/A)
GPIO_setMasterCore(48, GPIO_CORE_CPU1);
GPIO_setPinConfig(GPIO_48_GPIO48);
GPIO_setDirectionMode(48, GPIO_DIR_MODE_IN);
GPIO_setPadConfig(48, GPIO_PIN_TYPE_STD);
// GPIO49->Reserve (N/A)
GPIO_setMasterCore(49, GPIO_CORE_CPU1);
GPIO_setPinConfig(GPIO_49_GPIO49);
GPIO_setDirectionMode(49, GPIO_DIR_MODE_IN);
GPIO_setPadConfig(49, GPIO_PIN_TYPE_STD);
// GPIO50->Reserve (N/A)
GPIO_setMasterCore(50, GPIO_CORE_CPU1);
GPIO_setPinConfig(GPIO_50_GPIO50);
GPIO_setDirectionMode(50, GPIO_DIR_MODE_IN);
GPIO_setPadConfig(50, GPIO_PIN_TYPE_STD);
// GPIO51->Reserve (N/A)
GPIO_setMasterCore(51, GPIO_CORE_CPU1);
GPIO_setPinConfig(GPIO_51_GPIO51);
GPIO_setDirectionMode(51, GPIO_DIR_MODE_IN);
GPIO_setPadConfig(51, GPIO_PIN_TYPE_STD);
// GPIO52->Reserve (N/A)
GPIO_setMasterCore(52, GPIO_CORE_CPU1);
GPIO_setPinConfig(GPIO_52_GPIO52);
GPIO_setDirectionMode(52, GPIO_DIR_MODE_IN);
GPIO_setPadConfig(52, GPIO_PIN_TYPE_STD);
// GPIO53->Reserve (N/A)
GPIO_setMasterCore(53, GPIO_CORE_CPU1);
GPIO_setPinConfig(GPIO_53_GPIO53);
GPIO_setDirectionMode(53, GPIO_DIR_MODE_IN);
GPIO_setPadConfig(53, GPIO_PIN_TYPE_STD);