Assuming this is good to review despite the PR still being marked as a draft?

1. There's a lot of stuff on the root page, and the subsheets are basically empty. I think you could have your buck, battery charge circuitry, and current sensing on the same sheet? In general there's some messy stuff that would benefit from being tidied up, both for aesthetics but also readability.
2. You should note the fuse current, and on that note I think 6.3A is too high? my napkin calculation says that 4A is sufficient - 2A max through the gecko on both the 5V and 12V lines, and the battery current draw due to the 5V is at most (2A * (5V/12V) * 1/e) = 0.92A (assuming an efficiency of 90%).
3. On the 5V enable, I'm not sure why you're using the Drain-Source voltage to size R14/15? Should you not be using the Gate-Source Threshold voltage to calculate the divider such that V(HIGH) across the divider gives a voltage just above VGSth?
4. Your P-MOSFET has an insufficient Continuous Body Diode Forward Current (1.5A) - from the buck and the gecko we can output up to 2A, is there a reason we're limiting it here?
5. Is there a reason you don't have a low-pass RC filter on the INA2180? You should also make a note of the gain of the INA.
6. Rather than add a solder jumper to the CAN termination resistor, you could mark it as DNP and only add it if you do actually need it.

Please organize your schematic better, it is very difficult to read.

Still some weird schematic stuff - ex. lipo voltage from power subsheet goes to VCC on main sheet which only connects to 12V sense in on power subsheet?

1. Why is R8 so small? if 2A max this gives you a V range from 0 to 2V - try to use most of the voltage range (for the PIC, 0-5V)
2. I was thinking about this more - we also want current sense for the 12V rail to rocket, and battery charging current
3. Not sure how I missed this one, but the buck converter wants 3 1uF input capacitors.
   

Layout:
4. C13 and 14 are getting kind of far from the 12V input - probably best to do a 2x2 array of capacitors, if that makes sense?
5. You can move R1 and R2 closer to the buck
If you haven't already, read 9.4 of the buck datasheet, and also AN-1149

Spreadsheet is good. I wish every board designer did this
Schematic:
5V

1. Does FLT need an external pullup? Can the PIC internal GPIO pullup source enough current? This is the only reference I could find and it says "no"
   
   
2. schematic note for what this does?
   
3. This is kind of really broad but have you considered transient protection/reverse polarity protection? Most importantly is downstream, we don't want to reverse-voltage the 5V bus
   
   main
4. There is a builtin function for DNPs that makes it more obvious
   
   12V
5. Pullup for FLT - as above, schematic note for OVCSEL - as above
6. Why do you use 0.01uF for Cin if datasheet recommends 0.1uF?
7. Your schottky diode for the charge line is rated to 1A average fwd current. But your fuse is 5A to the battery (also consider that when charging you are also powering the entire bus. So the minimum current over the diode is (battery max charge current + 5V buck max input draw + 12V (2A since RILM is 475))
8. Why is F1 a chip fuse instead of a replaceable clip fuse (I think there is a standard littlefuse holder we use elsewhere?)
9. L1 is 42mR typ but Webench calls for 19mR
   

PCB:

1. Building on the charge current concerns above - are you exceeding the max current on a single gecko pin for the charge line?
   
2. standard hole spacing I believe is in increments of 0.5"
   
3. Dangling trace
   
4. I'm not going to check all your power trace sizes. But note that your cross-sectional area across this pour where it constricts is less than the width of the actual trace into the pin. You can almost certainly eke out a bit more space on the top-right of the gecko mounting hole
   
5. Bend osc traces in a "Y" shape rather than 90 deg
   
6. As Ash mentioned, try to spread components more evenly
7. Your edge cut is not straight
   
8. Minor nit, rn your buck gnd plane goes through your pad. you can move C12 and R2 to give yourself a larger path
   
9. You can move this to the side to match and not overlap ss
   
10. Can move C13 upward to bridge pours directly, then add more GND vias below
    
11. Nit silkscreen labels should be oriented the same way and not overlap vias
    

thats enough for now

Joe raises a good comment re: externall PU resistor on FLT signal lines from both fuses - I see this still isn't addressed?

Still haven't addressed my comment wrt both e-fuses needing to be on the same side?

Still haven't addressed my comment wrt both e-fuses needing to be on the same side?

Was thinking we can just use hot air and get around this. Rio is pretty confident it should be ok