From ce94b8ffaebcac6f94acc9cbee53c9baa8da5745 Mon Sep 17 00:00:00 2001 From: Edoardo Marangoni Date: Thu, 7 Nov 2024 15:38:06 +0100 Subject: [PATCH] fix(llvm): Fix `ADD_ABS_LO12_NC` relocation --- lib/compiler/src/engine/link.rs | 13 +++++++---- lib/types/src/compilation/relocation.rs | 29 ++++++++++++++++++++++--- 2 files changed, 35 insertions(+), 7 deletions(-) diff --git a/lib/compiler/src/engine/link.rs b/lib/compiler/src/engine/link.rs index 7aafeb82de9..2c674b615a6 100644 --- a/lib/compiler/src/engine/link.rs +++ b/lib/compiler/src/engine/link.rs @@ -182,10 +182,15 @@ fn apply_relocation( write_unaligned(reloc_address as *mut u32, op); }, RelocationKind::Aarch64AddAbsLo12Nc => unsafe { - let (reloc_address, reloc_delta) = r.for_address(body, target_func_address as u64); - let reloc_delta = (reloc_delta as u32 & 0xfff) - | (read_unaligned(reloc_address as *mut u32) & 0xFFC003FF); - write_unaligned(reloc_address as *mut u32, reloc_delta); + let (reloc_address, delta) = r.for_address(body, target_func_address as u64); + + let delta = delta as isize; + let op = read_unaligned(reloc_address as *mut u32); + let imm = ((delta as u32) & 0xfff) << 10; + let mask = !((0xfff) << 10); + let op = (op & mask) | imm; + + write_unaligned(reloc_address as *mut u32, op); }, RelocationKind::Aarch64Ldst128AbsLo12Nc => unsafe { let (reloc_address, reloc_delta) = r.for_address(body, target_func_address as u64); diff --git a/lib/types/src/compilation/relocation.rs b/lib/types/src/compilation/relocation.rs index f714542b2bf..186dae14e56 100644 --- a/lib/types/src/compilation/relocation.rs +++ b/lib/types/src/compilation/relocation.rs @@ -156,6 +156,16 @@ pub trait RelocationLike { /// to that address. /// /// The function returns the relocation address and the delta. + /// + // # Nomenclature (from [1]@5.7.3.3) + // + // * S (when used on its own) is the address of the symbol. + // * A is the addend for the relocation. + // * P is the address of the place being relocated (derived from r_offset). + // * X is the result of a relocation operation, before any masking or bit-selection operation is applied + // * Page(expr) is the page address of the expression expr, defined as (expr & ~0xFFF). (This applies even if the machine page size supported by the platform has a different value.) + // + // [1]: https://github.com/ARM-software/abi-aa/blob/main/aaelf64/aaelf64.rst fn for_address(&self, start: usize, target_func_address: u64) -> (usize, u64) { match self.kind() { RelocationKind::Abs8 @@ -164,7 +174,6 @@ pub trait RelocationLike { | RelocationKind::Arm64Movw2 | RelocationKind::Arm64Movw3 | RelocationKind::RiscvPCRelLo12I - | RelocationKind::Aarch64AddAbsLo12Nc | RelocationKind::Aarch64Ldst128AbsLo12Nc | RelocationKind::Aarch64Ldst64AbsLo12Nc => { let reloc_address = start + self.offset() as usize; @@ -200,10 +209,24 @@ pub trait RelocationLike { .wrapping_add(reloc_addend as u32); (reloc_address, reloc_delta_u32 as u64) } + RelocationKind::Aarch64AdrPrelLo21 => { + let s = target_func_address; + let p = start + self.offset() as usize; + let a = self.addend() as u64; + + (p, s.wrapping_add(a).wrapping_sub(p as u64)) + } + + RelocationKind::Aarch64AddAbsLo12Nc => { + let s = target_func_address; + let p = start + self.offset() as usize; + let a = self.addend() as u64; + + (p, s.wrapping_add(a)) + } RelocationKind::Arm64Call | RelocationKind::RiscvCall - | RelocationKind::RiscvPCRelHi20 - | RelocationKind::Aarch64AdrPrelLo21 => { + | RelocationKind::RiscvPCRelHi20 => { let reloc_address = start + self.offset() as usize; let reloc_addend = self.addend() as isize; let reloc_delta_u32 = target_func_address