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| 1 | +.text |
| 2 | + |
| 3 | + |
| 4 | +.globl amd64_switch |
| 5 | +#ifndef __APPLE__ |
| 6 | +.type amd64_switch, @function |
| 7 | +#endif |
| 8 | +.intel_syntax noprefix |
| 9 | +/* |
| 10 | + // https://en.wikipedia.org/wiki/X86_calling_conventions |
| 11 | + // https://aaronbloomfield.github.io/pdr/book/x86-64bit-ccc-chapter.pdf |
| 12 | +*/ |
| 13 | +amd64_switch: |
| 14 | + /* Store the current context */ |
| 15 | + mov QWORD PTR [rsi+0x0],rbx // register assumed unm. through a call |
| 16 | + mov QWORD PTR [rsi+0x8],rbp // register assumed unm. through a call |
| 17 | + mov QWORD PTR [rsi+0x10],r12 // register assumed unm. through a call |
| 18 | + mov QWORD PTR [rsi+0x18],r13 // register assumed unm. through a call |
| 19 | + mov QWORD PTR [rsi+0x20],r14 // register assumed unm. through a call |
| 20 | + mov QWORD PTR [rsi+0x28],r15 // register assumed unm. through a call |
| 21 | + mov rdx,QWORD PTR [rsp] // load the return address from top of stack |
| 22 | + mov QWORD PTR [rsi+0x30],rdx |
| 23 | + lea rcx,[rsp+0x8] // stack without return, lea to not change any flgs |
| 24 | + mov QWORD PTR [rsi+0x38],rcx |
| 25 | + fnstcw WORD PTR [rsi+0x40] // FPU control word |
| 26 | + stmxcsr DWORD PTR [rsi+0x44] // MXCSR control and status register |
| 27 | + /* restore the destination context */ |
| 28 | + mov rbx,QWORD PTR [rdi+0x0] |
| 29 | + mov rbp,QWORD PTR [rdi+0x8] |
| 30 | + mov r12,QWORD PTR [rdi+0x10] |
| 31 | + mov r13,QWORD PTR [rdi+0x18] |
| 32 | + mov r14,QWORD PTR [rdi+0x20] |
| 33 | + mov r15,QWORD PTR [rdi+0x28] |
| 34 | + fldcw WORD PTR [rdi+0x40] |
| 35 | + ldmxcsr DWORD PTR [rdi+0x44] |
| 36 | + mov rax,QWORD PTR [rdi+0x30] |
| 37 | + mov rcx,QWORD PTR [rdi+0x38] |
| 38 | + mov rsp,rcx |
| 39 | + jmp rax |
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