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John Kariuki

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John Kariuki

x86: add support for Intel CET

Sep 24, 2020

7f8ce0f · Sep 24, 2020

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This branch is 341 commits behind intel/isa-l_crypto:master.

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Name		Name	Last commit message	Last commit date
parent directory ..
aarch64		aarch64	sha512_mb:Optimize multi-buffer with sha3 instruction	Oct 30, 2019
Makefile.am		Makefile.am	sha512_mb:Optimize multi-buffer with sha3 instruction	Oct 30, 2019
sha512_ctx_avx.c		sha512_ctx_avx.c	sha512_mb: extend max size to over 4GB	Sep 20, 2017
sha512_ctx_avx2.c		sha512_ctx_avx2.c	sha512_mb: extend max size to over 4GB	Sep 20, 2017
sha512_ctx_avx512.c		sha512_ctx_avx512.c	sha512_mb: extend max size to over 4GB	Sep 20, 2017
sha512_ctx_base.c		sha512_ctx_base.c	mb_base: fix base implementation issue	Oct 30, 2019
sha512_ctx_base_aliases.c		sha512_ctx_base_aliases.c	build: add base aliases files	Aug 27, 2019
sha512_ctx_sb_sse4.c		sha512_ctx_sb_sse4.c	sha512_mb: extend max size to over 4GB	Sep 20, 2017
sha512_ctx_sse.c		sha512_ctx_sse.c	sha512_mb: extend max size to over 4GB	Sep 20, 2017
sha512_job.asm		sha512_job.asm	Format only patch from iindent and remove_whitespace	Jun 27, 2017
sha512_mb_mgr_datastruct.asm		sha512_mb_mgr_datastruct.asm	Format only patch from iindent and remove_whitespace	Jun 27, 2017
sha512_mb_mgr_flush_avx.asm		sha512_mb_mgr_flush_avx.asm	x86: add support for Intel CET	Sep 24, 2020
sha512_mb_mgr_flush_avx2.asm		sha512_mb_mgr_flush_avx2.asm	x86: add support for Intel CET	Sep 24, 2020
sha512_mb_mgr_flush_avx512.asm		sha512_mb_mgr_flush_avx512.asm	x86: add support for Intel CET	Sep 24, 2020
sha512_mb_mgr_flush_sse.asm		sha512_mb_mgr_flush_sse.asm	x86: add support for Intel CET	Sep 24, 2020
sha512_mb_mgr_init_avx2.c		sha512_mb_mgr_init_avx2.c	Fix num_lanes_inuse counting for some algorithms	Dec 31, 2019
sha512_mb_mgr_init_avx512.c		sha512_mb_mgr_init_avx512.c	Format only patch from iindent and remove_whitespace	Jun 27, 2017
sha512_mb_mgr_init_sse.c		sha512_mb_mgr_init_sse.c	Fix num_lanes_inuse counting for some algorithms	Dec 31, 2019
sha512_mb_mgr_submit_avx.asm		sha512_mb_mgr_submit_avx.asm	x86: add support for Intel CET	Sep 24, 2020
sha512_mb_mgr_submit_avx2.asm		sha512_mb_mgr_submit_avx2.asm	x86: add support for Intel CET	Sep 24, 2020
sha512_mb_mgr_submit_avx512.asm		sha512_mb_mgr_submit_avx512.asm	x86: add support for Intel CET	Sep 24, 2020
sha512_mb_mgr_submit_sse.asm		sha512_mb_mgr_submit_sse.asm	x86: add support for Intel CET	Sep 24, 2020
sha512_mb_rand_ssl_test.c		sha512_mb_rand_ssl_test.c	Format only patch from iindent and remove_whitespace	Jun 27, 2017
sha512_mb_rand_test.c		sha512_mb_rand_test.c	Format only patch from iindent and remove_whitespace	Jun 27, 2017
sha512_mb_rand_update_test.c		sha512_mb_rand_update_test.c	Format only patch from iindent and remove_whitespace	Jun 27, 2017
sha512_mb_test.c		sha512_mb_test.c	Format only patch from iindent and remove_whitespace	Jun 27, 2017
sha512_mb_vs_ossl_perf.c		sha512_mb_vs_ossl_perf.c	build:remove unused-result warning	May 20, 2020
sha512_mb_x2_avx.asm		sha512_mb_x2_avx.asm	x86: add support for Intel CET	Sep 24, 2020
sha512_mb_x2_sse.asm		sha512_mb_x2_sse.asm	x86: add support for Intel CET	Sep 24, 2020
sha512_mb_x4_avx2.asm		sha512_mb_x4_avx2.asm	x86: add support for Intel CET	Sep 24, 2020
sha512_mb_x8_avx512.asm		sha512_mb_x8_avx512.asm	x86: add support for Intel CET	Sep 24, 2020
sha512_multibinary.asm		sha512_multibinary.asm	fix: Define for cpuid7_ebx check to more correct name	Nov 11, 2019
sha512_ref.c		sha512_ref.c	Format only patch from iindent and remove_whitespace	Jun 27, 2017
sha512_sb_mgr_flush_sse4.c		sha512_sb_mgr_flush_sse4.c	Format only patch from iindent and remove_whitespace	Jun 27, 2017
sha512_sb_mgr_init_sse4.c		sha512_sb_mgr_init_sse4.c	Format only patch from iindent and remove_whitespace	Jun 27, 2017
sha512_sb_mgr_submit_sse4.c		sha512_sb_mgr_submit_sse4.c	Format only patch from iindent and remove_whitespace	Jun 27, 2017
sha512_sse4.asm		sha512_sse4.asm	x86: add support for Intel CET	Sep 24, 2020
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