-- Executing script file `read.ys' -- 1. Executing SystemVerilog frontend. [INF:CM0023] Creating log file "/home/daikim/synlig-segv/slpp_all/surelog.log". [INF:CP0300] Compilation... [INF:CP0303] /home/daikim/synlig-segv/bad.v:1:1: Compile module "work@foo". [INF:CP0302] Compile class "work@mailbox". [INF:CP0302] Compile class "work@process". [INF:CP0302] Compile class "work@semaphore". [INF:EL0526] Design Elaboration... [NTE:EL0503] /home/daikim/synlig-segv/bad.v:1:1: Top level module "work@foo". [NTE:EL0508] Nb Top level modules: 1. [NTE:EL0509] Max instance depth: 1. [NTE:EL0510] Nb instances: 1. [NTE:EL0511] Nb leaf instances: 1. [INF:UH0706] Creating UHDM Model... [INF:UH0707] Elaborating UHDM... [ FATAL] : 0 [ SYNTAX] : 0 [ ERROR] : 0 [WARNING] : 0 [ NOTE] : 5 Object 'work@foo' of type 'design' Object 'builtin' of type 'package' Object 'work@foo' of type 'module_inst' Object 'func1' of type 'function' Object '' of type 'logic_var' Object '' of type 'logic_typespec' Object '' of type 'range' Object '' of type 'constant' Object '' of type 'constant' Object 'a' of type 'io_decl' Object '' of type 'logic_typespec' Object '' of type 'range' Object '' of type 'constant' Object '' of type 'constant' Object 'state' of type 'array_var' Object '' of type 'logic_typespec' Object '' of type 'range' Object '' of type 'constant' Object '' of type 'constant' Object '' of type 'logic_typespec' Object '' of type 'range' Object '' of type 'constant' Object '' of type 'constant' Object 'i' of type 'integer_var' Object '' of type 'begin' Object '' of type 'logic_var' Object '' of type 'logic_typespec' Object '' of type 'range' Object '' of type 'constant' Object '' of type 'constant' Object 'state' of type 'array_var' Object '' of type 'logic_typespec' Object '' of type 'range' Object '' of type 'constant' Object '' of type 'constant' Object '' of type 'logic_typespec' Object '' of type 'range' Object '' of type 'constant' Object '' of type 'constant' Object 'i' of type 'integer_var' Object '' of type 'begin' Object '' of type 'for_stmt' Object '' of type 'assignment' Object 'i' of type 'ref_var' Object '' of type 'constant' Object '' of type 'operation' Object 'i' of type 'ref_obj' Object '' of type 'constant' Object '' of type 'assignment' Object 'i' of type 'ref_obj' Object '' of type 'operation' Object 'i' of type 'ref_obj' Object '' of type 'constant' Object '' of type 'begin' Object '' of type 'assignment' Object 'state' of type 'bit_select' Object 'i' of type 'ref_obj' Object '' of type 'constant' Object '' of type 'assignment' Object 'state' of type 'var_select' Object 'i' of type 'ref_obj' Object 'i' of type 'ref_obj' Object '' of type 'constant' Object '' of type 'assignment' Object 'func1' of type 'ref_obj' Object '' of type 'operation' Object 'state' of type 'bit_select' Object '' of type 'constant' Object 'a' of type 'ref_obj' Object 'func1' of type 'function' Object '' of type 'logic_var' Object '' of type 'logic_typespec' Object '' of type 'range' Object '' of type 'constant' Object '' of type 'constant' Object 'a' of type 'io_decl' Object '' of type 'logic_typespec' Object '' of type 'range' Object '' of type 'constant' Object '' of type 'constant' Object 'state' of type 'array_var' Object '' of type 'logic_typespec' Object '' of type 'range' Object '' of type 'constant' Object '' of type 'constant' Object '' of type 'logic_typespec' Object '' of type 'range' Object '' of type 'constant' Object '' of type 'constant' Object 'i' of type 'integer_var' Object '' of type 'begin' Object '' of type 'logic_var' Object '' of type 'logic_typespec' Object '' of type 'range' Object '' of type 'constant' Object '' of type 'constant' Object 'state' of type 'array_var' Object '' of type 'logic_typespec' Object '' of type 'range' Object '' of type 'constant' Object '' of type 'constant' Object '' of type 'logic_typespec' Object '' of type 'range' Object '' of type 'constant' Object '' of type 'constant' Object 'i' of type 'integer_var' Object '' of type 'begin' Object '' of type 'for_stmt' Object '' of type 'assignment' Object 'i' of type 'ref_var' Object '' of type 'constant' Object '' of type 'operation' Object 'i' of type 'ref_obj' Object '' of type 'constant' Object '' of type 'assignment' Object 'i' of type 'ref_obj' Object '' of type 'operation' Object 'i' of type 'ref_obj' Object '' of type 'constant' Object '' of type 'begin' Object '' of type 'assignment' Object 'state' of type 'bit_select' Object 'i' of type 'ref_obj' Object '' of type 'constant' Object '' of type 'assignment' Object 'state' of type 'var_select' Object 'i' of type 'ref_obj' Object 'i' of type 'ref_obj' Object '' of type 'constant' Object '' of type 'assignment' Object 'func1' of type 'ref_obj' Object '' of type 'operation' Object 'state' of type 'bit_select' Object '' of type 'constant' Object 'a' of type 'ref_obj' Object 'out' of type 'port' Object '' of type 'logic_typespec' Object '' of type 'range' Object '' of type 'constant' Object '' of type 'constant' Object 'out' of type 'logic_net' Object '' of type 'logic_typespec' Object '' of type 'range' Object '' of type 'constant' Object '' of type 'constant' Object '' of type 'cont_assign' Object 'out' of type 'ref_obj' Object 'func1' of type 'func_call' Object '' of type 'constant' Generating RTLIL representation for module `\foo'. Dumping AST before simplification: AST_MODULE [0x5ad338c81940] str='\foo' AST_FUNCTION [0x5ad338b4f220] str='\func1' AST_WIRE [0x5ad338caec60] str='\func1' logic AST_RANGE [0x5ad338ce1240] in_param AST_CONSTANT [0x5ad338dad480] bits='00000000000000000000000000000001'(32) signed range=[31:0] int=1 in_param AST_CONSTANT [0x5ad338b9bcc0] bits='00000000000000000000000000000000'(32) signed range=[31:0] in_param AST_WIRE [0x5ad338b6f350] str='\a' input logic port=2 dimensions=[1:0] AST_RANGE [0x5ad338d686a0] basic_prep range=[1:0] in_param AST_CONSTANT [0x5ad338d671c0] bits='00000000000000000000000000000001'(32) signed basic_prep range=[31:0] int=1 in_param AST_CONSTANT [0x5ad338b8a220] bits='00000000000000000000000000000000'(32) signed basic_prep range=[31:0] in_param AST_WIRE [0x5ad338dd9640] str='\state' logic AST_RANGE [0x5ad338c9ab80] in_param AST_CONSTANT [0x5ad338b6ffa0] bits='00000000000000000000000000000011'(32) signed range=[31:0] int=3 in_param AST_CONSTANT [0x5ad338c20f00] bits='00000000000000000000000000000000'(32) signed range=[31:0] in_param AST_WIRE [0x5ad338c6d6b0] str='\i' signed AST_RANGE [0x5ad338c59930] range=[31:0] in_param AST_CONSTANT [0x5ad338e5cab0] bits='00000000000000000000000000011111'(32) signed range=[31:0] int=31 in_param AST_CONSTANT [0x5ad338c7d4d0] bits='00000000000000000000000000000000'(32) signed range=[31:0] in_param AST_BLOCK [0x5ad338ebe800] AST_BLOCK [0x5ad338719d90] str='$unnamed_block$1' AST_WIRE [0x5ad33874f8b0] logic AST_RANGE [0x5ad338b8ae20] in_param AST_CONSTANT [0x5ad338c65150] bits='00000000000000000000000000000011'(32) signed range=[31:0] int=3 in_param AST_CONSTANT [0x5ad338c84d40] bits='00000000000000000000000000000000'(32) signed range=[31:0] in_param AST_WIRE [0x5ad338e7fcf0] str='\state' logic AST_RANGE [0x5ad338d96700] in_param AST_CONSTANT [0x5ad338cbca40] bits='00000000000000000000000000000011'(32) signed range=[31:0] int=3 in_param AST_CONSTANT [0x5ad338c6c720] bits='00000000000000000000000000000000'(32) signed range=[31:0] in_param AST_WIRE [0x5ad338da6c20] str='\i' signed AST_RANGE [0x5ad33874e860] range=[31:0] in_param AST_CONSTANT [0x5ad338b8b6e0] bits='00000000000000000000000000011111'(32) signed range=[31:0] int=31 in_param AST_CONSTANT [0x5ad338db6fd0] bits='00000000000000000000000000000000'(32) signed range=[31:0] in_param AST_BLOCK [0x5ad338e7bd40] AST_BLOCK [0x5ad338c8e9b0] str='$fordecl_block1' AST_FOR [0x5ad33874eee0] str='$loop1' AST_ASSIGN_EQ [0x5ad338c3cf20] AST_IDENTIFIER [0x5ad33875e470] str='\i' in_lvalue AST_CONSTANT [0x5ad33874d750] bits='00000000000000000000000000000000'(32) signed range=[31:0] AST_LT [0x5ad33875e940] in_param AST_IDENTIFIER [0x5ad338ca8000] str='\i' in_param AST_CONSTANT [0x5ad338dcb360] bits='00000000000000000000000000000100'(32) signed range=[31:0] int=4 in_param AST_ASSIGN_EQ [0x5ad338d59ac0] AST_IDENTIFIER [0x5ad338ebdf50] str='\i' in_lvalue AST_ADD [0x5ad338d011a0] AST_IDENTIFIER [0x5ad338d8e0b0] str='\i' AST_CONSTANT [0x5ad338d32590] bits='00000000000000000000000000000001'(32) signed range=[31:0] int=1 AST_BLOCK [0x5ad338b8bf90] str='$loop1' AST_ASSIGN_EQ [0x5ad338bbd470] AST_IDENTIFIER [0x5ad338d5d010] str='\state' in_lvalue AST_RANGE [0x5ad338c00700] in_lvalue AST_IDENTIFIER [0x5ad338d481d0] str='\i' in_lvalue AST_CONSTANT [0x5ad338e80850] bits='00000000000000000000000000000000'(32) signed range=[31:0] AST_ASSIGN_EQ [0x5ad338d46c20] AST_IDENTIFIER [0x5ad338caf2a0] str='\state' in_lvalue AST_MULTIRANGE [0x5ad338e768e0] in_lvalue AST_RANGE [0x5ad338d37180] in_lvalue AST_IDENTIFIER [0x5ad338dd6ac0] str='\i' in_lvalue AST_RANGE [0x5ad3386cd570] in_lvalue AST_IDENTIFIER [0x5ad338773eb0] str='\i' in_lvalue AST_CONSTANT [0x5ad338748540] bits='1'(1) range=[0:0] int=1 AST_ASSIGN_EQ [0x5ad338767d90] AST_IDENTIFIER [0x5ad338c917c0] str='\func1' in_lvalue AST_BIT_XOR [0x5ad338d58f70] AST_IDENTIFIER [0x5ad338d24150] str='\state' AST_RANGE [0x5ad338d5c810] AST_CONSTANT [0x5ad338cd70f0] bits='00000000000000000000000000000000'(32) signed range=[31:0] AST_IDENTIFIER [0x5ad338d5c5b0] str='\a' AST_WIRE [0x5ad338ccd360] str='\out' output logic port=3 dimensions=[1:0] AST_RANGE [0x5ad338e5e5d0] basic_prep range=[1:0] in_param AST_CONSTANT [0x5ad338c74960] bits='00000000000000000000000000000001'(32) signed basic_prep range=[31:0] int=1 in_param AST_CONSTANT [0x5ad338b721c0] bits='00000000000000000000000000000000'(32) signed basic_prep range=[31:0] in_param AST_ASSIGN [0x5ad338dbbb40] AST_IDENTIFIER [0x5ad338dc8490] str='\out' in_lvalue AST_FCALL [0x5ad338ec3160] str='\func1' AST_CONSTANT [0x5ad338e80ef0] bits='11'(2) range=[1:0] int=3 --- END OF AST DUMP --- Dumping Verilog AST before simplification: module foo(out); output [1:0] out; /** AST_FUNCTION **/ assign out = /** AST_FCALL **/; endmodule --- END OF AST DUMP --- Warning: wire '\func1$func$/home/daikim/synlig-segv/bad.v:19$1.$unnamed_block$1.i' is assigned in a block at /home/daikim/synlig-segv/bad.v:10.12-10.17.